Agilex™ 5 FPGA E-Series 065B Modular Development Kit User Guide

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ID 820977
Date 8/14/2025
Public
Document Table of Contents
Document Table of Contents x
1. Overview 2. Getting Started 3. Development Kit Setup 4. Board Test System 5. Development Kit Hardware and Configuration 6. Custom Projects for the Development Kit 7. HPS Boot 8. Document Revision History for the Agilex™ 5 FPGA E-Series 065B Modular Development Kit User Guide A. Development Kit Components B. Developer Resources C. Safety and Regulatory Compliance Information
1. Overview x
1.1. Block Diagram 1.2. Feature Summary 1.3. Box Contents 1.4. Recommended Operating Conditions
2. Getting Started x
2.1. Before You Begin 2.2. Handling the Board 2.3. Software and Driver Installation 2.4. Quick Start Guide
2.2. Handling the Board x
2.2.1. Handling the DIP Switches
2.3. Software and Driver Installation x
2.3.1. Installing the Quartus® Prime Pro Edition Software 2.3.2. Installing the Development Kit 2.3.3. Installing the Ashling* RiscFree* Integrated Development Environment (IDE) 2.3.4. Installing the Altera® FPGA Download Cable II Driver
3. Development Kit Setup x
3.1. Default Settings 3.2. Powering Up the Development Kit 3.3. Performing Board Restore
3.3. Performing Board Restore x
3.3.1. Restoring Board QSPI Flash U24 with Default Factory Image 3.3.2. Restoring SD Card with the Default Factory Image
4. Board Test System x
4.1. Set Up BTS GUI Running Environment 4.2. Troubleshooting for Launching BTS 4.3. BTS Functionalities
4.1. Set Up BTS GUI Running Environment x
4.1.1. Setting Up the Quartus® Prime Software for BTS Operation 4.1.2. Running the BTS GUI
4.3. BTS Functionalities x
4.3.1. The Clock Functionality 4.3.2. The Power Functionality 4.3.3. The MAX® 10 Functionality 4.3.4. The Agilex™ 5 FPGA Functionality 4.3.5. Other Functionalities
4.3.1. The Clock Functionality x
4.3.1.1. Si5332 4.3.1.2. Si5518 4.3.1.3. Si549 4.3.1.4. Si569 4.3.1.5. Si52202
4.3.2. The Power Functionality x
4.3.2.1. Power Monitor 4.3.2.2. Temperature Monitor
4.3.3. The MAX® 10 Functionality x
4.3.3.1. The System Tab 4.3.3.2. The IO Control Tab
4.3.4. The Agilex™ 5 FPGA Functionality x
4.3.4.1. The Configure Menu 4.3.4.2. The Info Tab 4.3.4.3. The Transceiver Tab 4.3.4.4. The Memory Tab 4.3.4.5. The GPIO Tab
4.3.4.3. The Transceiver Tab x
4.3.4.3.1. The FMC+ Tab 4.3.4.3.2. The SFP+ Tab 4.3.4.3.3. The DP Tab 4.3.4.3.4. The HDMI Tab
4.3.4.3.1. The FMC+ Tab x
4.3.4.3.1.1. The FMC+ Test Tab 4.3.4.3.1.2. The FMC+ Status Tab
4.3.4.4. The Memory Tab x
4.3.4.4.1. The COMP-2B Tab 4.3.4.4.2. The COMP-3B Tab 4.3.4.4.3. The COMP-3A Tab
4.3.4.5. The GPIO Tab x
4.3.4.5.1. The Push Button Tab 4.3.4.5.2. The Dip Switch Tab 4.3.4.5.3. The I2C Bus Tab
4.3.5. Other Functionalities x
4.3.5.1. The Diagnostic Functionality 4.3.5.2. The System Information 4.3.5.3. The Connection Information 4.3.5.4. The Bottom Information Bar
5. Development Kit Hardware and Configuration x
5.1. Configuring the FPGA and Accessing HPS Debug Access Port by JTAG 5.2. Configuring the FPGA Device by Active Serial (AS) Modes (Default Mode)
6. Custom Projects for the Development Kit x
6.1. Golden Top 6.2. EMIF Pin Swizzling Setting
A. Development Kit Components x
A.1. Board Overview A.2. System Management A.3. Power A.4. Clocks A.5. General Input/Output A.6. Memory Interfaces A.7. Board to Board Connector A.8. Communication Interfaces
A.1. Board Overview x
A.1.1. Board Components
A.7. Board to Board Connector x
A.7.1. Modular Board Primary Connector A.7.2. Modular Board Secondary Connector A.7.3. Carrier Board Primary Connector A.7.4. Carrier Board Secondary Connector
C. Safety and Regulatory Compliance Information x
C.1. Safety and Regulatory Information C.2. Compliance Information
C.1. Safety and Regulatory Information x
C.1.1. Safety Warnings C.1.2. Safety Cautions
1. Overview
2. Getting Started
3. Development Kit Setup
4. Board Test System
5. Development Kit Hardware and Configuration
6. Custom Projects for the Development Kit
7. HPS Boot
8. Document Revision History for the Agilex™ 5 FPGA E-Series 065B Modular Development Kit User Guide
A. Development Kit Components
B. Developer Resources
C. Safety and Regulatory Compliance Information

8. Document Revision History for the Agilex™ 5 FPGA E-Series 065B Modular Development Kit User Guide

Document Version Changes
2025.08.14
  • Added information for Agilex™ 5 FPGA E-Series 065B Modular Development Kit (ES2) version Table: Ordering Information.
  • Added a note about PCIe* link in Feature Summary.
  • Updated the default position for the S2[1:4] switch in Table: Factory Default Switch Settings (Carrier Board).
  • Updated Temperature Monitor.
  • Added new topic—The HDMI Tab.
  • Retitled the following topics:
    • The COMP0 Tab to The COMP-2B Tab.
    • The COMP1 Tab to The COMP-3B Tab.
    • The HPS COMP Tab to The COMP-3A Tab.
    • The Sys Info to The System Information.
    • The Bottom Info Bar to The Bottom Information Bar.
  • Updated the following figures:
    • Figure: USB and Power Connection to Run BTS GUI
    • Figure: Power Tab—Carrier Board
    • Figure: Power Tab—Modular Board
    • Figure: Temperature Tab
    • Figure: The Configure Menu
    • Appendix Figure: Power Sequence— Agilex™ 5 E-Series Modular Board
  • Updated document to the latest branding standards.
2025.06.16 Added a note about Agilex™ 5 GTS PCIe* AXI Streaming design example in Feature Summary.
2025.04.16
  • Added a note to The I2C Bus Tab.
  • Updated Table: Agilex™ 5 FPGA E-Series 065B Modular Development Kit References.
2025.03.07
  • Update the Overview chapter:
    • Updated Figure: Agilex™ 5 FPGA E-Series 065B Modular Development Kit Block Diagram.
  • Updated the Getting Started chapter:
    • Added new topics:
      • Before You Begin
      • Handling the Board
      • Handling the DIP Switches
      • Installing the Quartus® Prime Pro Edition Software
      • Installing the Intel® SoC EDS
      • Installing the Development Kit
      • Installing the Intel® FPGA Download Cable II Driver
    • Retitled topic Quartus® Software and Driver Installation to Software and Driver Installation
  • Updated the Development Kit Setup chapter:
    • Updated Table: Factory Default Switch Settings (Carrier Board) to change the default position of the SW.2 switch from POS-1 to POS-3.
    • Updated the Powering Up the Development Kit topic for clarity.
    • Updated step 2 in the Restoring SD Card with the Default Factory Image topic for clarity.
  • Updated the Board Test System chapter:
    • Updated and retitled topic Installing Quartus Prime Software to Setting Up the Quartus® Prime Software for BTS Operation.
    • Updated the steps in the Running the BTS GUI topic.
    • Updated Figure: BTS Package Folder.
    • Added Figure: UART Port Configuration to the Troubleshooting for Launching BTS topic.
    • Updated the Power Monitor topic.
    • Added information about the CLOCK MUX option in The IO Control Tab topic.
    • Updated Figure: The Configure Menu.
    • Retitled topic and figure The Main Info Tab to The Info Tab.
    • Updated the The Info Tab topic.
    • Added DP x4 to the list of port tests in the The Transceiver Tab topic.
    • Updated Figure: The FMC+ Test Tab.
    • Updated Figure: The FMC+ Status Tab.
    • Updated Figure: The SFP+ Test Tab.
    • Updated Figure: The SFP+ Status Tab.
    • Updated the The COMP0 Tab topic:
      • Updated Figure: The COMP0 Test Tab.
      • Updated information about the COMP0 Test tab.
      • Added Figure: The COMP0 Parameter Tab.
      • Added information about the COMP0 Parameter tab.
      • Removed information about the COMP0 Traffic Generator tab.
      • Removed Figure: The COMP0 Control Tab—Traffic Generator.
    • Updated The COMP1 Tab topic:
      • Updated Figure: The COMP1 Test Tab.
      • Added Figure: The COMP1 Parameter Tab.
      • Removed Figure: The COMP1 Control Tab—Traffic Generator.
    • Updated The HPS COMP Tab topic:
      • Updated Figure: The HPS COMP Test Tab.
      • Added Figure: The HPS COMP Parameter Tab.
      • Removed Figure: The COMP1 Control Tab—Traffic Generator.
    • Added new topics:
      • The DP Tab
      • The GPIO Tab
      • The Push Button Tab
      • The Dip Switch Tab
      • The I2C Tab
    • Updated Figure: Diagnostic Functionality of BTS.
  • Updated the Custom Projects for the Development Kit chapter:
    • Updated the description in EMIF Pin Swizzling Setting.
    • Updated Figure: Entering a PIN_SWIZZLE Specification.
  • Updated the Development Kit Components appendix chapter:
    • Updated Table: MAX® 10 BMC in General Input/Output.
    • Updated Figure: Clock Tree in Clocks.
    • Updated Figure: I2C Serial Bus in Communication Interfaces.
  • Added new Appendix chapter—Developer Resources.
  • Restructured the document for clarity.
  • Made editorial edits throughout the document.
2024.07.12 Initial release.
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