AN 977: Nios® V Processor Custom Instruction

ID 773194
Date 4/14/2023
Document Table of Contents

2.1. Custom Instruction Types

Table 1.  Custom Instruction Types, Applications, and Hardware Ports
Instruction Type Application Hardware Ports
Multicycle1 Multi-clock cycle custom logic blocks of variable durations
  • clk
  • reset
  • data0[31:0]
  • data1[31:0]
  • alu_result[31:0]
  • ctrl[31:0](Reserved for other use)
  • enable
  • result[31:0]
  • done
Extended Custom logic blocks that contain multiple instructions

Standard multicycle custom instruction ports, with ctrl[31:0] as extension index.

External Interface

Custom logic blocks that interface to logic outside of the Nios® V processor’s datapath.

  • Standard multicycle custom instruction ports
  • User-defined interface to external logic
1 For combinational or single-cycle instructions, you need to implement them as two-cycles instructions.