AN 977: Nios® V Processor Custom Instruction

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ID 773194
Date 4/14/2023
Public
Document Table of Contents
Document Table of Contents x
1. Nios® V Processor Custom Instruction Overview 2. Custom Instruction Hardware Interface 3. Custom Instruction Software Interface 4. Designing with Intel® Quartus® Prime and Platform Designer 5. Document Revision History for AN 977: Nios® V Processor Custom Instruction
1. Nios® V Processor Custom Instruction Overview x
1.1. Implementing Custom Instruction 1.2. Implementing Custom Instruction Logic Block 1.3. Implementing Custom Instruction Software
2. Custom Instruction Hardware Interface x
2.1. Custom Instruction Types 2.2. Multicycle Custom Instructions 2.3. Extended Custom Instruction 2.4. External Interface Custom Instructions
2.2. Multicycle Custom Instructions x
2.2.1. Multicycle Custom Instruction Ports 2.2.2. Multicycle Custom Instruction Timing 2.2.3. Implementing Combinational Custom Instruction
2.3. Extended Custom Instruction x
2.3.1. Extended Custom Instruction Timing
3. Custom Instruction Software Interface x
3.1. Custom Instruction Software C Macro 3.2. Custom Instruction Assembly Language Interface 3.3. Custom Instruction Word Format
3.2. Custom Instruction Assembly Language Interface x
3.2.1. Custom Instruction Assembly Language Syntax
3.3. Custom Instruction Word Format x
3.3.1. Selector and Extension Indexes 3.3.2. ALU Switch 3.3.3. User-defined Immediate
4. Designing with Intel® Quartus® Prime and Platform Designer x
4.1. Interface Signals 4.2. Custom Instruction Manager 4.3. Custom Instruction Subordinate
4.1. Interface Signals x
4.1.1. alu_result port 4.1.2. ctrl port
4.2. Custom Instruction Manager x
4.2.1. Hardware Interfaces Table 4.2.2. Software C-Macro Table
4.3. Custom Instruction Subordinate x
4.3.1. Writing the Custom Instruction HDL File 4.3.2. Opening the Component Editor 4.3.3. Specifying the Custom Instruction Component Type 4.3.4. Displaying the Custom Instruction Block Symbol 4.3.5. Adding the Custom Instruction HDL File 4.3.6. Configuring the Custom Instruction Parameter Type 4.3.7. Setting Up the Custom Instruction Interfaces 4.3.8. Saving and Adding the Custom Instruction 4.3.9. Generating and Compiling the Processor System
1. Nios® V Processor Custom Instruction Overview
2. Custom Instruction Hardware Interface
3. Custom Instruction Software Interface
4. Designing with Intel® Quartus® Prime and Platform Designer
5. Document Revision History for AN 977: Nios® V Processor Custom Instruction

3.3. Custom Instruction Word Format

The Nios® V processor custom instructions are based on the R-type instruction format. The instruction word specifies the selector index, extension index, immediate, ALU switch and register usage. The ctrl port delivers the 32-bit custom instruction word to the custom logic blocks.

Besides the opcode (hardcoded in Platform Designer), rs2, rs1, and rd fields (allocated during software compilation), you can assign funct7 and funct3 fields to serve different purposes. You can either hardcode the funct7 and funct3 fields in Platform Designer or translate the fields as input arguments in the software C-macro.

Table 6.  32-bit Custom Instruction Word Format
32-bit Custom Instruction Bit Field
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
funct7[6:0] rs2 rs1
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
rs1 funct3[2:0] rd opcode

Each of the bit field serves the following purposes:

Table 7.  Bits Description
Bits Function
funct7[6:4]
  • Optional selector index
  • User-defined immediate
funct7[3:0]
  • Extension index
  • User-defined immediate
rs2 Source register of data1
rs1 Source register of data0
funct3[2:0]
  • Extension index
  • ALU switch
  • User-defined immediate
rd Destination register for result
opcode Required selector index

Section Content
Selector and Extension Indexes
ALU Switch
User-defined Immediate

Level Two Title