MACsec Intel® FPGA System Design User Guide

ID 767516
Date 10/02/2023

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Document Table of Contents

7.8. Running Non-UVM Simulation

The design simulation for checking the Reference Design’s functionality is done in the sim/ directory, which contains the necessary files for the simulation.

The <Project_Directory>/release)1p0/MACSEC_Release_1.0/MACSEC_SysED_Instruction_Readme_2.0.txt file contains the steps to run the simulation.

The steps for running the simulation are provided below.
  1. Navigate to the env/ directory.
  2. Source the environment settings. This is to be done only once in a shell.

    -- source

    -- source

  3. For E-tile there is no need for support logic generation, but for F-tile designs follow the steps below for supporting logic generation.
    • Go to $SRD_ROOTDIR/sim/common and source the script below for the appropriate support logic generation for F-tile based design.
      1. Support logic generation 25G full design:

        sh agx_nr_mudv 25G

      2. Support logic generation 25G Lightweight MCDMA BFM design:

        sh agx_nr_mudv 25G 1

      3. Support logic generation 100G full design:

        sh agx_nr_mudv 100G

      4. Support logic generation 100G Lightweight MCDMA BFM design:

        sh agx_nr_mudv 100G 1

  4. For E-tile based design simulation: Go to $SRD_ROOTDIR/sim/common_ptile.

    For F-tile based design simulation: Go to $SRD_ROOTDIR/sim/common.

    Source the script, for IP simulation files generation.

    The ip_list.f contains the list of all IPs used in the design.

    sh ip_list.f

  5. Navigate to the sim/runDir directory.
  6. Run the simulation using the ./ command with arguments. The supported arguments are shown in Simulation Command Arguments. The test cases are provided in the sim/testcase folder. Each test case has the test description mentioned in the first few lines of the file.

The following figure represents a typical run of the “” test:

TBINFO: address = 0a000034, readdata = 00000000
TBINFO: address = 0a000038, readdata = 00000000
TBINFO: address = 0a000058, readdata = 00000000
TBINFO: address = 0a000060, readdata = 00010000
TBINFO: address = 0a000064, readdata = 00000000
TBINFO: address = 0a000068, readdata = 00022df8
TBINFO: address = 0a00006c, readdata = 00000000
TBINFO: address = 0a000070, readdata = 000045bf
TBINFO: address = 0a000074, readdata = 00000000
TBINFO: address = 0a000078, readdata = 00004b72
TBINFO: address = 0a00007c, readdata = 00000000
TBINFO: address = 0a000000, readdata = 00000651
TBINFO: address = 0a000000, writedata32 = 00000611
TBINFO: Function 1 Clearing Packet Client Stats
TBINFO: address = 0a000000, readdata = 00000611
TBINFO: address = 0a000000, writedata32 = 00000699
TBINFO: address = 0a000000, readdata = 00000699
TBINFO: address = 0a000000, writedata32 = 00000611
TBINFO: Function 1 TX/RX packet check OK
*** TX PERFORMANCE MEASUREMENT *** no. of bytes = 0x22df8 num_ticks = 0x45bf perf_data = 25.6000 Gb/s
*** RX PERFORMANCE MEASUREMENT *** no. of bytes = 0x10000 num_ticks = 0x4b72 perf_data = 10.8582 Gb/s
TBINFO: Function 1 Stop pkt gen TX
TBINFO: address = 0a000000, writedata32 = 00000100

TBINFO: *****************************************
TBINFO: Simulation Passed.
TBINFO: Testbench complete
TBINFO: *****************************************

$finish called from file "../../tbTop/", line 125.
$finish at simulation time 522309564000

Following a successful simulation, a subdirectory is created in the /runDir directory which corresponds to the test just run.

For example, the following directory is created for the “” test:

<project directory>/sim/runDir/combinedTrafficTest

Within this test-specific directory, you can find all log files for the test as well as a .vpd file (if you used the -m 1 simulation argument) which allows you to bring up waves for the test run using the Synopsys DVE tool.