AN 991: Partial Reconfiguration via Configuration Pins (External Host) Reference Design: for Intel® Agilex® F-Series FPGA Development Board

ID 750856
Date 11/14/2022

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Step 7: Compiling the Base Revision

  1. To compile the base revision, click Processing > Start Compilation. Alternatively, the following command compiles the base revision:
    quartus_sh --flow compile  blinking_led -c blinking_led
  2. Inspect the bitstream files that generate in the output_files directory.
    Table 5.  Generated Files
    Name Type Description
    blinking_led.sof Base programming file Used for full-chip base configuration
    blinking_led.pr_partition.rbf PR bitstream file for base persona Used for partial reconfiguration of base persona.
    blinking_led_static.qdb .qdb database file Finalized database file used to import the static region.