Nios® V Processor Software Developer Handbook

ID 743810
Date 5/26/2023
Public

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3.4.4. Handling Exceptions

The HAL infrastructure provides a robust interrupt handling service routine and an API for exception handling. The Nios® V processor can handle exceptions caused by hardware interrupts, unimplemented instructions, and software traps.

This section discusses exception handling with the Nios® V processor internal interrupt controller.

Consider the following common issues and important points before you use the HAL-provided exception handler:

  • Prioritization of interrupts: The Nios® V processor does not prioritize its 16 platform interrupt, but the HAL exception handler assigns higher priority to lower numbered interrupts. You must modify the interrupt request (IRQ) prioritization of your peripherals in Platform Designer.
  • Nesting of interrupts: The HAL infrastructure allows interrupts to be nested— higher priority interrupts can preempt processor control from an exception handler that is servicing a lower priority interrupt. However, Intel recommends that you not nest your interrupts because of the associated performance penalty.
  • Exception handler environment: When creating your exception handler, you must ensure that the handler does not run interrupt-dependent functions and services, because this can cause deadlock. For example, an exception handler should not call the IRQ-driven version of the printf() function.