Nios® V Processor Software Developer Handbook

ID 743810
Date 5/26/2023
Public

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8.2.1. HAL APIs for Hardware Interrupts

Intel provides the Enhanced HAL Hardware Interrupt API for writing, registering, and managing hardware ISRs. The Nios® V processor supports up to 16 hardware interrupts.

The interrupt APIs include the following types of routines:

  • Routines to be called by a device driver to register an ISR
  • Routines to be called by an ISR to manage its environment
  • Routines to be called by BSP or application code to control ISR behavior

The interrupt APIs support the following types of BSPs:

  • Bare-metal HAL BSP
  • Micrium MicroC/OS-II (uC/OS-II) BSP
  • FreeRTOS* BSP
Note: The legacy hardware interrupt API is deprecated and not supported in Nios® V processor-based system.