Nios® V Processor Software Developer Handbook

ID 743810
Date 5/26/2023
Public

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6.11.1. Apply Compiler Flags

riscv32-unknown-elf-gcc is the provided RISC-V toolchain in the Ashling* RiscFree* IDE for Intel® FPGAs. Compiler switch may be of use when optimizing code for small RAM footprints. These switches can be set in the BSP Editor GUI settings.

  • -Os: This is the most important compiler switch when optimizing for space. This instructs riscv32-unknown-elf-gcc to pervasively optimize for space rather than speed.

  • -Og: Alternatively, this generates codes that is easier to understand by the debugger during debugging.