Nios® V Processor Software Developer Handbook

ID 743810
Date 5/26/2023
Public

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8.1.3.1. How the Internal Interrupt Controller Works

With the IIC, 16 independent hardware interrupt signals are available. These interrupt signals allow software to prioritize interrupts, although the interrupt signals themselves have no inherent priority.
Note: With the IIC, Nios® V exceptions are not vectored. Therefore, the same exception address receives control for all types of exceptions. The general exception funnel at that address must determine the type of software exception or hardware interrupt.