Visible to Intel only — GUID: rim1646336954977
Ixiasoft
1. Overview
2. Getting Started
3. Power Up the Development Kit
4. Board Test System
5. Development Kit Hardware and Configuration
6. Custom Projects for the Development Kit
7. Document Revision History for the Intel Agilex® 7 FPGA I-Series Transceiver-SoC Development Kit User Guide
A. Development Kit Components
B. Additional Information
Visible to Intel only — GUID: rim1646336954977
Ixiasoft
5.2. Configure the FPGA Device Using the AS Mode (Default Mode)
- Default S9 setting and system Intel® MAX® 10 image support the active serial (AS) configuration mode.
- Plug pre-programmed SDM QSPI flash daughter into J3.
- Power on and observe FPGA user LED behavior.
Did you find the information on this page useful?
Feedback Message
Characters remaining: