AN 941: Design Block Reuse Tutorial: for Intel® Agilex™ F-Series FPGA Development Board

ID 709312
Date 12/10/2021
Public
Document Table of Contents

1.2. Tutorial Software and Hardware

This tutorial assumes a basic understanding of Verilog HDL design and the Intel® Quartus® Prime Pro Edition design flow. The steps in this tutorial correspond with use of the following Intel® software and hardware.
  • Linux installation of Intel® Quartus® Prime Pro Edition software version 21.3, with Intel® Agilex™ device support.
  • The Intel® Agilex™ FPGA Development Kit.
Note: You can also adapt this tutorial for Windows and other software or hardware configurations.