AN 941: Design Block Reuse Tutorial: for Intel® Agilex™ F-Series FPGA Development Board

ID 709312
Date 12/10/2021
Public
Document Table of Contents

1.7.2. Step 2: Compile the Design

After adding the .sdc and root partition to the Consumer project, run a full compilation of the design.
  1. To run full compilation, click Compile Design on the Compilation Dashboard.
  2. View the results of compilation in the Compilation Report.