Intel® FPGA SDK for OpenCL™ Pro Edition: Programming Guide

ID 683846
Date 9/26/2022

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7.24. Compiling Your Kernel with Memory Error Correction Coding (-ecc)

Attention: Error correction coding (ECC) is an early Intel® FPGA SDK for OpenCL™ feature that is at the preview stage. Full use of this feature, including the reporting of corrected errors and detected but uncorrected errors, requires an ECC-ready Custom Platform from your board vendor.
Include the -ecc option in your aoc command to direct the Intel® FPGA SDK for OpenCL™ Offline Compiler to enable error correction coding on the kernel memories (that is, M20ks and MLABs).

The ECC implementation has single error correction and double error detection capabilities for each 32-bit word.

Enabling the ECC feature costs an area overhead both in the number of RAMs and ALMs, as well as causes degradation in the Fmax of the system.
To direct the offline compiler to enable error correction coding hardware implementation, invoke the aoc -ecc <your_kernel_filename>.cl command.