AN 690: PCI Express* Avalon® -MM DMA Reference Design

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ID 683824
Date 5/08/2017
Public
Document Table of Contents
Document Table of Contents x
1. AN 690: PCI Express Avalon-MM DMA Reference Design
1. AN 690: PCI Express Avalon-MM DMA Reference Design x
1.1. Deliverables Included with the Reference Design 1.2. Reference Design Functional Description 1.3. Avalon-MM DMA 1.4. Reference Design 1.5. DMA Operation Flow 1.6. Running the Reference Design 1.7. Understanding PCI Express Throughput 1.8. Document Revision History for AN-690
1.2. Reference Design Functional Description x
1.2.1. Parameter Settings
1.6. Running the Reference Design x
1.6.1. Installing the Driver and Application 1.6.2. Installing the Windows Software 1.6.3. Installing the Hardware 1.6.4. Running the Software 1.6.5. Peak Throughput
1.7. Understanding PCI Express Throughput x
1.7.1. Throughput for Posted Writes 1.7.2. Throughput for Reads
1.7.1. Throughput for Posted Writes x
1.7.1.1. Specifying the Maximum Payload Size
1. AN 690: PCI Express Avalon-MM DMA Reference Design

1.8. Document Revision History for AN-690

Date Version Changes
May 2017 Quartus® Prime Pro v17.1 Stratix® 10 ES Editions Made the following changes:
  • Added support for Stratix® 10 devices.
  • Fixed minor errors and typos.
May 2016 6.0 Made the following changes:
  • Added support for Linux.
February 2016 5.0 Made the following changes:
  • Added support for Windows.
  • Added support for Arria® V , Arria 10, and Cyclone V® devices.
Novermber, 2014 4.0 Corrected typographical errors in the unit used to express data rate and throughput.
September, 2014 3.0 Updated the link in the introduction section to point to the latest version of the V-Series Avalon-MM DMA Interface for PCIe Solutions User Guide.
July, 2014 2.0 Made the following changes:
  • Updated the Avalon-MM DMA section to indicate that descriptor controller is embedded in the main DMA. Updated the descriptions of Read Data Mover, Write Data Mover, and Descriptor Controller.
  • Updated DMA Operation Flow section.
  • Removed DMA Descriptor Registers and DMA Control and Status Registers sections.
  • Added a new section called Reference Design with block diagram, block, and port descriptions.
  • Updated the steps in Software Installation and Running the Software sections.
August, 2013 1.0 Initial Release.
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