AN 872: Thermal and Power Guidelines: For Intel® Programmable Acceleration Card with Intel® Arria® 10 GX FPGA

ID 683795
Date 8/30/2019

3.3.1. Using the Intel® Quartus® Prime Programmer

You must have the micro USB cable connected between the Intel® FPGA PAC and the server to execute these steps:
  1. Find the Root Port and Endpoint of the Intel® FPGA PAC card:
    $ lspci -tv | grep 09c4 

    Example output 1 shows that the Root Port is d7:0.0 and the Endpoint is d8:0.0 :

    -+-[0000:d7]-+-00.0-[d8]----00.0 Intel Corporation Device 09c4

    Example output 2 shows that the Root Port is 0:1.0 and the Endpoint is 3:0.0:

     +-01.0-[03]----00.0 Intel Corporation Device 09c4
    Example output 3 shows that the Root Port is 85:2.0 and the Endpoint is 86:0.0 and.:
    +-[0000:85]-+-02.0-[86]----00.0  Intel Corporation Device 09c4 
    Note: No output indicates a PCIe* device enumeration failure and that flash is not programmed.
    #Mask uncorrectable errors and correctable errors of FPGA
    $ sudo setpci -s d8:0.0 ECAP_AER+0x08.L=0xFFFFFFFF
    $ sudo setpci -s d8:0.0 ECAP_AER+0x14.L=0xFFFFFFFF
    # Mask uncorrectable errors and Mask correctable errors of RP
    $ sudo setpci -s d7:0.0 ECAP_AER+0x08.L=0xFFFFFFFF
    $ sudo setpci -s d7:0.0 ECAP_AER+0x14.L=0xFFFFFFFF
  2. Run the following Intel® Quartus® Prime Programmer command:
    sudo $QUARTUS_HOME/bin/quartus_pgm -m JTAG -o 'pvbi;afu_*.sof'
    ***** Info: Running Quartus Prime Programmer Info: Version
    17.0.0 Build 290 04/26/2017 SJ Pro Edition Info: Copyright (C)
    2017 Intel Corporation. All rights reserved. Info: Your use of
    Intel Corporation's design tools, logic functions Info: and
    other software and tools, and its AMPP partner logic Info:
    functions, and any output files from any of the foregoing
    Info: (including device programming or simulation files), and
    any Info: associated documentation or information are
    expressly subject Info: to the terms and conditions of the
    Intel Program License Info: Subscription Agreement, the Intel
    Quartus Prime License Agreement, Info: the Intel MegaCore
    Function License Agreement, or other Info: applicable license
    agreement, including, without limitation, Info: that your use
    is for the sole purpose of programming logic Info: devices
    manufactured by Intel and sold by Intel or its Info:
    authorized distributors. Please refer to the applicable Info:
    agreement for further details. Info: Processing started: Sun
    Jan 21 06:39:24 2018 Info: Command: quartus_pgm -m JTAG -o
    pvbi;dcp_1_1.jic Info (213045): Using programming cable
    "A10SA4 [1-]" Info (213011): Using programming file
    dcp_1_1.jic with checksum 0x237FE3AA for device 10AX115N3@1
    Info (209060): Started Programmer operation at Sun Jan 21
    06:39:37 2018 Info (209016): Configuring device index 1 Info
    (209017): Device 1 contains JTAG ID code 0x02E660DD Info
    (209007): Configuration succeeded -- 1 device(s) configured
    Info (209018): Device 1 silicon ID is 0x21 Info (209044):
    Erasing ASP configuration device(s) Info (209019): Blankchecking
    device(s) Info (209023): Programming device(s) Info
    (209021): Performing CRC verification on device(s) Info
    (209011): Successfully performed operation(s) Info (209061):
    Ended Programmer operation at Sun Jan 21 06:45:38 2018 Info:
    Quartus Prime Programmer was successful. 0 errors, 0 warnings
    Info: Peak virtual memory: 1871 megabytes Info: Processing
    ended: Sun Jan 21 06:45:38 2018 Info: Elapsed time: 00:06:14
    Info: Total CPU time (on all processors): 00:00:45 
  3. To unmask uncorrectable errors and mask correctable errors, run the following commands:
    # Unmask uncorrectable errors and mask correctable errors of FPGA
    $ sudo setpci -s d8:0.0 ECAP_AER+0x08.L=0x00000000
    $ sudo setpci -s d8:0.0 ECAP_AER+0x14.L=0x00000000
    # Unmask uncorrectable errors and mask correctable errors of RP:
    $ sudo setpci -s d7:0.0 ECAP_AER+0x08.L=0x00000000
    $ sudo setpci -s d7:0.0 ECAP_AER+0x14.L=0x00000000
  4. Reboot.

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