SmartVID Controller IP Core User Guide

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ID 683770
Date 5/08/2017
Public

3.1. SmartVID Controller Operation

The SmartVID controller operation flow chart shows how the SmartVID controller operates.
Figure 2. SmartVID Controller Flow Chart
The following items describe the flowchart sequence.
  • After the deassertion of the reset signal, the SmartVID controller waits for bit 0 of the CC1 register (VID_OP_START) to be 1.
  • When VID_OP_START is 1, the SmartVID controller reads the fuse value.
  • Then vidctl_vid_code_avail goes high indicating a new VID code is available.
  • The user logic interface asserts vidctl_vid_ack indicating that the new VID code is read.
  • If you turned off the SmartVID feature in the parameter editor, the IP core checks if the VID code is 0.9 V. If the VID code is less than 0.9 V, the IP core starts incrementing the VID code by x value until the default value 0×30 is achieved. Then it waits for the SmartVID feature to be enabled.
    Note: x value is the value defined in Step size in vid code in the parameter editor or through the VID_STEP SIZE register.
  • If you turned on the SmartVID feature, the IP core checks if the device temperature grade is Extended (E) or Industrial. If the grade is E, the IP core decrements the VID code by x value which causes vidctl_vid_code_avail to go high.
  • The user logic controller asserts vidctl_vid_ack so that new VID code can be computed. vidctl_vid_ack stays asserted until the VID code is updated. Every time, when a new VID code is computed, vidctl_vid_code_avail goes high. The VID code remains the same until the user logic controller asserts vidctl_vid_ack.

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