Intel® Agilex™ Device Configuration via Protocol (CvP) Implementation User Guide

ID 683763
Date 9/26/2022
Public
Document Table of Contents

5.3. VSEC Registers for CvP

The Vendor Specific Extended Capability (VSEC) registers occupy byte offsets 0xD00 to 0xD4C in the PCIe* Configuration Space. The PCIe* host uses these registers to communicate with the FPGA control block. The following table shows the VSEC register map. Subsequent tables provide the fields and descriptions of each register.

Table 5.  VSEC Registers for CvP
Byte Offset Register Name
0xD00 Vendor Specific Capability Header
0xD04 Vendor Specific Header
0xD08 Intel Marker
0xD0C:0xD18 Reserved
0xD1C User Configurable Device/Board ID
0xD1E CvP Status
0xD20 CvP Mode Control
0xD24 CvP Data 22
0xD28 CvP Data
0xD2C CvP Programming Control
0xD30:0xD44 Reserved
0xD48 CvP Credit Register
2 This register is no longer functional in Intel® Agilex™ devices.

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