HDMI Intel® Stratix 10 FPGA IP Design Example User Guide

ID 683701
Date 12/27/2022

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1.3. Hardware and Software Requirements

Intel uses the following hardware and software to test the design example.


  • Intel® Stratix® 10 FPGA (L-tile or H-tile) Development Kit
  • HDMI Source (Graphics Processor Unit (GPU))
  • HDMI Sink (Monitor)
  • Bitec HDMI FMC 2.0 daughter card (Revision 11) or Bitec HDMI FMC 2.1 daughter card (Revision 9)
  • HDMI cables
Note: You can select the revision of your Bitec HDMI daughter card. For HDMI 2.0 design examples, set the local parameter BITEC_DAUGHTER_CARD_REV to 4, 6, or 11 in the top-level file ( s10_hdmi2_demo.v). When you change the revision, the design may swap the transceiver channels and invert the polarity according to the Bitec HDMI daughter card requirements. If you set the BITEC_DAUGHTER_CARD_REV parameter to 0, the design does not make any changes to the transceiver channels and the polarity. For HDMI 2.1 design examples, under the Design Example tab, set HDMI Daughter Card Revision to either Revision 9, Revision 4, or no daughter card. The default value is Revision 9.


  • Intel® Quartus® Prime Pro Edition version 20.4 and later (for hardware testing)
  • ModelSim* - Intel® FPGA Edition, ModelSim* - Intel® FPGA Starter Edition, , Riviera-PRO* , VCS* (Verilog HDL only)/ VCS* MX, or Xcelium* Parallel simulator