HDMI Intel® Stratix 10 FPGA IP Design Example User Guide

ID 683701
Date 12/27/2022

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1.6. Design Limitation

You need to consider some limitations when instantiating the HDMI Intel® FPGA IP design examples.

  • You may encounter longer lock time using the HDMI RX for HDMI 2.0 resolution. This limitation will be resolved in a future release.