AN 777: Data Word Alignment Calibration With Multiple Intel FPGA PHYLite for Parallel Interfaces IP Cores

ID 683631
Date 1/12/2018

1.4. Hardware Setup

The following steps are to setup the Intel® Arria® 10 FPGA development kit before running the reference design.

  1. Set the Intel® Arria® 10 FPGA development board switches to according to the following figure.
    Figure 6.  Intel® Arria® 10 FPGA Development Board Switch Settings
  2. Connect the loopback FPGA mezzanine (FMC) daughter card on the FMC loopback Port B.
    Figure 7. Connection for Loopback FPGA Mezzanine (FMC) Daughter Card
  3. Connect the Intel® FPGA Download Cable to the Intel® Arria® 10 FPGA development kit and your host machine.
  4. Click Tools -> Programmer to program the <project directory> /master_image/top.sof file into the Arria 10 FPGA development board.

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