AN 777: Data Word Alignment Calibration With Multiple Intel FPGA PHYLite for Parallel Interfaces IP Cores

ID 683631
Date 1/12/2018
Public

1.8. Reference Design Architecture

Figure 14. Reference Design Block Diagram
The reference design contains:
  • dut_INPUT module
  • dut_OUTPUT module
  • PLL module
  • Avalon controller
  • ATSO_DYN_CFG_CTRL module with Nios II processor
  • Traffic generator

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