Intel® Quartus® Prime Pro Edition User Guide: Platform Designer

ID 683609
Date 6/26/2023
Public

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2.7.5. Specifying IP Component Instantiation Options

When you instantiate an Intel® FPGA IP component in a system, Platform Designer instantiates the IP as a generic component that contains references to the HDL entity name, module and interface assignments, compilation library, HDL ports, interfaces, and system-info parameters. You can specify options that control the appearance of a component in the system.
To specify options that control the appearance of IP details and symbol in the system, follow these steps:
  1. To open the Component Instantiation tab, click View > Component Instantiation.
  2. For Implementation Type, select the IP (Default), HDL, Blackbox, or HLS type. Component Implementation Type Options defines these types.
  3. Under Compilation Info, specify the HDL Entity name and HDL compilation library name for the implementation. These values are fixed for the IP Implementation Type.
  4. In the Signals & Interfaces tab, define the port boundary of the component. Click <<add interface>> or <<add signal>> to add the interfaces and signals.
  5. Optionally, click the Block symbol tab to visualize the signals and interfaces added in the Signals & Interfaces tab.
  6. Optionally, in the Export tab you can export the signals and interfaces of an IP component as an IP-XACT file or a _hw.tcl file.
    Figure 54. Component Instantiation Tab
    Note: Platform Designer supports importing and exporting files in IP-XACT 2009 format and exporting IP-XACT files in 2014 format.