Intel® Quartus® Prime Pro Edition User Guide: Platform Designer

ID 683609
Date 6/26/2023
Public

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6.15.13. Avalon® Clock Sink Signal Roles

A clock sink provides a timing reference for other interfaces and internal logic.
Table 112.  Clock Sink Signal Roles
Signal Role Width Direction Required Description
clk 1 Input Yes A clock signal. Provides synchronization for internal logic and for other interfaces.