AN 711: Power Reduction Features in Intel® Arria® 10 Devices

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ID 683566
Date 5/27/2022
Public
Document Table of Contents
Document Table of Contents x
AN 711: Power Reduction Features in Intel® Arria® 10 Devices
AN 711: Power Reduction Features in Intel® Arria® 10 Devices x
Power Reduction and Performance Intel® Arria® 10 Power Reduction Techniques System Topology Options SmartVID Topologies SmartVID Power Savings Estimation VID Design for Intel® Arria® 10 FPGAs Document Revision History for AN 711: Power Reduction Features in Intel® Arria® 10 Devices
Intel® Arria® 10 Power Reduction Techniques x
SmartVID SmartVID General Configuration
System Topology Options x
Power Sense Lines
SmartVID Topologies x
SmartVID Controller IP Core Parallel Control System PMBus Control System Single-Wire Interface PWM Control System
Parallel Control System x
Intel® Quartus® Prime Parallel Control System Instantiation Parallel SmartVID Regulator Implementation Guidelines
PMBus Control System x
PMBus System Implementation PMBus Voltage Regulators PMBus VID Implementation Guidelines
Single-Wire Interface PWM Control System x
Single-Wire Interface PWM System Implementation
SmartVID Power Savings Estimation x
Enabling SmartVID in the Intel® Quartus® Prime Software
VID Design for Intel® Arria® 10 FPGAs x
Parallel VID PMBus SmartVID VID Design Guidelines
AN 711: Power Reduction Features in Intel® Arria® 10 Devices

VID Design Guidelines

Intel recommends that you follow these guidelines to ensure VID system robustness.

  • Power regulator ramp time for 10-mV changes:
    • Minimum = 20 µs
    • Maximum = 45 µs
    Note: The maximum ramp time is bounded by the configuration via protocol (CvP) requirement. This is only required if it is linked to TRISE of VCC_core.
  • 10 ms interval for every 10 mV step changes on top of the ramp time requirement above.
    Figure 17. Power Regulator Behavior Based on Ramp Time and 10-ms IntervalThis example shows a 20-µs ramp time and a VID voltage of 0.86 V.
    Table 5.  Operating Recommendations for VID Device Based on Temperature Grade
    Device Temperature Grade Implementation Scheme
    Extended temperature (0° C to 100° C)
    • User mode temperature dependency control scheme: Disabled
    • VID voltage changes immediately following user mode and before any user activity begins.
    Industrial temperature (-40° C to 100° C)
    • User mode temperature dependency control scheme: Enabled
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