JESD204B Intel® Agilex™ FPGA IP Design Example User Guide

ID 683530
Date 10/14/2022
Document Table of Contents

4.3.4. SPI Master

The SPI master module is a standard Platform Designer component in the IP Catalog standard library. This module uses the SPI protocol to facilitate the configuration of external converters (for example, ADC, DAC, external clock modules) via a structured register space inside the converter device. The SPI master has an Avalon® memory-mapped interface that connects to the Avalon® master (JTAG to Avalon® master bridge) via the Avalon® memory-mapped interconnect and can receive configuration instructions from the Avalon® master.

This module is configured to a 4-wire, 24-bit width interface. If the Generate 3-Wire SPI Module option is selected, an additional module is instantiated to convert the 4-wire output of the SPI master to 3-wire.

For more details on the SPI master module, refer to the JESD204B Intel® FPGA IP User Guide.