Multi Channel DMA Intel® FPGA IP for PCI Express Design Example User Guide

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ID 683517
Date 4/17/2023
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Document Table of Contents
Document Table of Contents x
1. Introduction 2. Design Example Detailed Description 3. Design Example Quick Start Guide 4. Multi Channel DMA Intel FPGA IP for PCI Express Design Example User Guide Archives 5. Revision History for the Multi Channel DMA Intel FPGA IP for PCI Express Design Example User Guide
1. Introduction x
1.1. Terms and Acronyms 1.2. MCDMA IP Modes
2. Design Example Detailed Description x
2.1. Design Example Overview 2.2. Hardware and Software Requirements 2.3. PIO Using MCDMA Bypass Mode 2.4. Avalon-ST Packet Generate/Check 2.5. Avalon-ST Device-side Packet Loopback 2.6. Avalon-MM DMA 2.7. BAM_BAS Traffic Generator and Checker 2.8. External Descriptor Controller
2.1. Design Example Overview x
2.1.1. MCDMA H-Tile Design Examples for Endpoint 2.1.2. MCDMA P-Tile Design Examples for Endpoint 2.1.3. MCDMA F-Tile Design Examples for Endpoint 2.1.4. MCDMA R-Tile Design Examples for Endpoint
2.3. PIO Using MCDMA Bypass Mode x
2.3.1. Avalon-ST PIO Using MCDMA Bypass Mode 2.3.2. Avalon-MM PIO Using MCDMA Bypass mode
2.3.1. Avalon-ST PIO Using MCDMA Bypass Mode x
2.3.1.1. Single-Port Avalon-ST PIO Using MCDMA Bypass Mode
2.3.2. Avalon-MM PIO Using MCDMA Bypass mode x
2.3.2.1. Simulation Results 2.3.2.2. Hardware Test Results
2.4. Avalon-ST Packet Generate/Check x
2.4.1. Single-Port Avalon-ST Packet Generate/Check
2.4.1. Single-Port Avalon-ST Packet Generate/Check x
2.4.1.1. Simulation Waveforms 2.4.1.2. Simulation Log 2.4.1.3. Hardware Test Result
2.5. Avalon-ST Device-side Packet Loopback x
2.5.1. Simulation Results 2.5.2. Hardware Test Results
2.6. Avalon-MM DMA x
2.6.1. Simulation Results 2.6.2. Hardware Test Results
2.7. BAM_BAS Traffic Generator and Checker x
2.7.1. BAM_BAS Traffic Generator and Checker Example Design Register Map
2.8. External Descriptor Controller x
2.8.1. Registers 2.8.2. Hardware Test Results
2.8.1. Registers x
2.8.1.1. GCSR Registers (Base address 64’h00000) 2.8.1.2. QCSR Registers(Base address 64’h10000)
3. Design Example Quick Start Guide x
3.1. Design Example Directory Structure 3.2. Generating the Example Design using Intel® Quartus® Prime 3.3. Simulating the Design Example 3.4. Compiling the Example Design in Intel® Quartus® Prime 3.5. Running the Design Example Application on a Hardware Setup
3.2. Generating the Example Design using Intel® Quartus® Prime x
3.2.1. Procedure
3.3. Simulating the Design Example x
3.3.1. Testbench Overview 3.3.2. Supported Simulators 3.3.3. Example Testbench Flow for DMA Test with Avalon-ST Packet Generate/Check Design Example 3.3.4. Run the Simulation Script 3.3.5. Steps to Run the Simulation 3.3.6. View the Results
3.3.5. Steps to Run the Simulation x
3.3.5.1. Steps to Run the Simulation : QuestaSim* / Questa* Intel® FPGA Edition 3.3.5.2. Steps to Run the Simulation : VCS* / VCS* MX 3.3.5.3. Steps to Run the Simulation : Xcelium*
3.5. Running the Design Example Application on a Hardware Setup x
3.5.1. Program the FPGA 3.5.2. Quick Start Guide
3.5.2. Quick Start Guide x
3.5.2.1. Software Test Setup 3.5.2.2. Driver Support 3.5.2.3. MCDMA Custom Driver 3.5.2.4. MCDMA DPDK Poll Mode Driver 3.5.2.5. MCDMA Kernel Mode Network Device Driver
3.5.2.3. MCDMA Custom Driver x
3.5.2.3.1. Prerequisites 3.5.2.3.2. Software Setup 3.5.2.3.3. Run the Reference Example Application 3.5.2.3.4. Testing Bitstream Configuration beyond 256 Channels (for MCDMA Custom Driver) 3.5.2.3.5. External Descriptor Mode Verification
3.5.2.3.1. Prerequisites x
3.5.2.3.1.1. Configuration Changes from BIOS 3.5.2.3.1.2. External Packages 3.5.2.3.1.3. Set the Boot Parameters
3.5.2.3.2. Software Setup x
3.5.2.3.2.1. Installing the Linux Kernel Driver 3.5.2.3.2.2. Build and Install User Space Library 3.5.2.3.2.3. Enabling VFs and Create Guest VM by Using QEMU 3.5.2.3.2.4. Establish Communication Between Host and QEMU
3.5.2.3.3. Run the Reference Example Application x
3.5.2.3.3.1. Meta Data Test 3.5.2.3.3.2. BAM Test 3.5.2.3.3.3. BAS Test 3.5.2.3.3.4. Packet Gen Test
3.5.2.4. MCDMA DPDK Poll Mode Driver x
3.5.2.4.1. Prerequisites 3.5.2.4.2. Install PMD and Test Application (for CentOS) 3.5.2.4.3. Install PMD and Test Application (for Ubuntu) 3.5.2.4.4. Run the Reference Example Application
3.5.2.4.1. Prerequisites x
3.5.2.4.1.1. Set the Boot Parameters 3.5.2.4.1.2. Configuration Changes from BIOS 3.5.2.4.1.3. Install and Build Testpmd
3.5.2.4.2. Install PMD and Test Application (for CentOS) x
3.5.2.4.2.1. Create VM Environment
3.5.2.4.4. Run the Reference Example Application x
3.5.2.4.4.1. Example of Verifying on an AVMM Design 3.5.2.4.4.2. Testing Bitstream Configuration beyond 256 Channels (for DPDK Poll Mode Driver) 3.5.2.4.4.3. BAM Test 3.5.2.4.4.4. BAS Test
3.5.2.5. MCDMA Kernel Mode Network Device Driver x
3.5.2.5.1. Build and Install Netdev Driver 3.5.2.5.2. Enable VFs if SRIOV is Supported 3.5.2.5.3. Configure the Number of Channels Supported on the Device 3.5.2.5.4. Configure the MTU Value 3.5.2.5.5. Configure the Device Communication 3.5.2.5.6. Configure Transmit Queue Selection Mechanism 3.5.2.5.7. Test Procedure by Using Name Space Environment 3.5.2.5.8. PIO Test
3.5.2.5.6. Configure Transmit Queue Selection Mechanism x
3.5.2.5.6.1. MCDMA Queue Selection 3.5.2.5.6.2. Transmit Packet Steering (XPS) 3.5.2.5.6.3. Default
1. Introduction
2. Design Example Detailed Description
3. Design Example Quick Start Guide
4. Multi Channel DMA Intel FPGA IP for PCI Express Design Example User Guide Archives
5. Revision History for the Multi Channel DMA Intel FPGA IP for PCI Express Design Example User Guide

3.5.2.4.1.3. Install and Build Testpmd

Note: test-pmd is supported only for CentOS and not for Ubuntu.
If testing the MCDMA by using test-pmd, use the following steps; otherwise, if using perfq_app, skip to Install PMD and Test Application (for CentOS):
  1. Download dpdk and apply the build patches.

    Execute the following commands with root as user.

    $ cd software/dpdk/dpdk/patches/v20.05-rc1

    $ sh apply-patch.sh

  2. Enable IGB_UIO module in build configuration.
    Update the following macro in ./config/common_base to “y”. By default, igb_uio is disabled. 
    CONFIG_RTE_EAL_IGB_UIO=y
  3. Enable the below macro for channels more than 16:
    CONFIG_RTE_ETHDEV_QUEUE_STAT_CNTRS=128
  4. Undefine IFC_BUF_REUSE macro for Testpmd in drivers/net/mcdma/rte_pmd_mcdma.h, by default it is enabled.
    #undef IFC_BUF_REUSE
  5. In case to avoid Tx drop count, enable the following macro in the file: drivers/net/mcdma/rte_pmd_mcdma.h.
    This is applicable for pkt-gen only. Skip this step for loopback. 
    #define AVOID_TX_DROP_COUNT
  6. Build DPDK and install.
    Execute the following steps:
    1. $ export DPDK_DIR= <cloned dir>/software/dpdk/patches/v20.05-rc1/dpdk
    2. $ export RTE_SDK=${DPDK_DIR}
    3. $ export DPDK_TARGET=x86_64-native-linuxapp-gcc
    4. $ export RTE_TARGET=x86_64-native-linuxapp-gcc
    5. $ export DPDK_BUILD=$DPDK_DIR/$DPDK_TARGET
    6. $ make config T=x86_64-native-linuxapp-gcc
    7. $ rm -rf x86_64-native-linuxapp-gcc
    8. $ make -j32 install T=$DPDK_TARGET DESTDIR=install
  7. Install the UIO base module.

    $ modprobe uio

  8. Install the igb_uio module.

    $ insmod x86_64-native-linuxapp-gcc/build/kernel/linux/igb_uio/igb_uio.ko

  9. Bind the device to the igb_uio driver.

    $ ./usertools/dpdk-devbind.py -b igb_uio <BDF>

    For example:

    $ ./usertools/dpdk-devbind.py -b igb_uio 01:00.0

  10. Run Testpmd cli.
No. of Queue Test PMD Command Line (Loop Mode)
1 
./x86_64-native-linuxapp-gcc/app/testpmd -c f -n 4 -w 0000:01:00.0 -- --tx-first\
 --nb-cores=1 --rxq=1 --txq=1 --rxd=512 --txd=512--max-pkt-len=<payload len> --no-flush-rx\
 --stats-period 1 --burst=127 --txpkts=<payload len>
2 
./x86_64-native-linuxapp-gcc/app/testpmd -c f -n 4 -w 0000:01:00.0 -- --tx-first\
 --nb-cores=2 --rxq=2 --txq=2 --rxd=512 --txd=512 --max-pkt-len=<payload len> --no-flush-rx\
 --stats-period 1 –burst=254 --txpkts=<payload len>
3 
./x86_64-native-linuxapp-gcc/app/testpmd -c f -n 4 -w 0000:01:00.0 -- --tx-first\
 --nb-cores=3 --rxq=3 --txq=3 --rxd=512 --txd=512 --max-pkt-len=64 --no-flush-rx\
 --stats-period 1 --burst=508 --txpkts=<payload len>
4 
./x86_64-native-linuxapp-gcc/app/testpmd -c ff -n 4 -w 0000:01:00.0 -- --tx-first\
 --nb-cores=4 --rxq=4 --txq=4 --rxd=512 --txd=512 --max-pkt-len=64 --no-flush-rx\
 --stats-period 1 --burst=127 --txpkts=<payload len>
8 
./x86_64-native-linuxapp-gcc/app/testpmd -c fff -n 4 -w 0000:01:00.0 -- --tx-first\
 --nb-cores=8 --rxq=8 --txq=8 --rxd=512 --txd=512 --max-pkt-len=<payload len> --no-flush-rx\
 --stats-period 1 --burst=127 --txpkts=<payload len>
Forwarding Mode Test PMD Command Line
Only Rx Mode 
./x86_64-native-linuxapp-gcc/app/testpmd -c f -n 4 -w 0000:01:00.0 --\
 --forward-mode=rxonly --nb-cores=1 --rxq=1 --txq=1 --rxd=512 --txd=512 --max-pkt-len=<payload len>\
 --no-flush-rx --stats-period 1 --burst=127 --txpkts=<payload len>
Only Tx Mode 
./x86_64-native-linuxapp-gcc/app/testpmd -c f -n 4 -w 0000:01:00.0 --\
 --forward-mode=txonly --nb-cores=1 --rxq=1 --txq=1 --rxd=512 --txd=512 --max-pkt-len=<payload len>\
 --no-flush-rx --stats-period 1 --burst=254 --txpkts=<payload len>
Note: --burst=0 : If set to 0, driver default is used (i.e. 16 burst-size). Otherwise, the Test PMD default burst size (i.e. 32) is used. The default Testpmd pkt-len, in the case of Tx, is 64.

Use the following command to run test-pmd:

$./x86_64-native-linuxapp-gcc/app/testpmd -c f -n 4 -w
0000:01:00.0 -- --tx-first --nb-cores=1 --rxq=1 --txq=1 --rxd=512
--txd=512 --max-pkt-len=64 --no-flush-rx --stats-period 1 --
burst=127 --txpkts=64
Parameters used:
  1. BDF of device. (-w 0000:01:00.0)
  2. Forwarding mode (--tx-first)
  3. Number of cores (--nb-cores=1)
  4. Number of RX and TX queues per port (--rxq=1 --txq=1)
  5. Number of descriptors in the RX and TX rings (--rxd=512 --txd=512)
  6. Max packet length (max-pkt-len=64)
  7. Display statistics every PERIOD seconds (--stats-period 1)
  8. Number of packets per burst (--burst=127)
Note: This hardware test was run with the Intel® Stratix® 10 GX H-tile PCIe Gen3 x16 configuration.
Note: Hardware test with P-Tile Gen4 x16 may be added in a future release.
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