Multi Channel DMA Intel® FPGA IP for PCI Express Design Example User Guide

ID 683517
Date 4/17/2023

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Document Table of Contents Single-Port Avalon-ST PIO Using MCDMA Bypass Mode

This design example enables Avalon-MM PIO master which bypasses the DMA path. The Avalon-MM PIO master (rx_pio_master) allows your application to perform single, non-bursting register read/write operation with on-chip memory. This design example only supports PIO functionality and does not perform DMA operations. Hence, the Avalon-ST DMA ports are not connected.

Figure 1. MCDMA IP Single Port Avalon-ST Interface PIO Example Design using MCDMA Bypass Mode