| 2025.05.08 |
25.1 |
- Added Agilex™ 3 support where appropriate throughout.
- In the PTC - Report Page topic, added a note to the Recommended Margin description in the Current and Power Regulator Requirements Per Voltage Rail table.
|
| 2024.09.26 |
24.1 |
Corrected the word "training" to "trailing" in the description of Full Hierarchy Name in Table: I/O Page Information for Agilex™ FPGA Portfolio Devices. |
| 2024.04.01 |
24.1 |
- Updated several topics to include support for Agilex™ 5 devices.
|
| 2023.12.04 |
23.4 |
- Major updates to Intel® FPGA PTC - I/O Page.
- Split the I/O Page Information table for Stratix® 10 and Agilex™ devices.
- Added an image for I/O page of the Intel® FPGA PTC for Stratix® 10 device.
- Revised the description in the tables for Stratix® 10 and Agilex™ devices.
- Added notes for Application, Write Enable%, and Read Enable% columns.
- Minor updates to Agilex™ -specific table in Intel® FPGA PTC - Transceiver Page.
- Updated images in the following topics:
- Overview of the Intel® FPGA Power and Thermal Calculator
- Intel® FPGA PTC Primary GUI Components
- Intel® FPGA PTC IP Power Summary
- Intel® FPGA PTC IP Power Summary
- Finding Resources Using the Find Dialog Box
- Made minor updates to the description in Finding Resources Using the Find Dialog Box.
- Revised the information in Estimating Power Before Starting the FPGA Design.
|
| 2023.10.02 |
23.3 |
- Moved the following topics to Intel® FPGA Power and Thermal Calculator Graphical User Interface chapter:
- Using Design Hierarchies in the Intel® FPGA Power and Thermal Calculator
- Entering Hierarchy Information Into the Intel® FPGA PTC
- Exporting, Importing, Duplicating, Renaming, and Deleting Hierarchies in the Intel® FPGA PTC
- Bulk Editing Hierarchies in the Intel FPGA PTC
- Revised the "Override Device Selection" image in Estimating Power While Creating the FPGA Design.
- Revised the " Intel® FPGA PTC Hierarchy Manager" image in Entering Hierarchy Information Into the FPGA PTC and added a new section for "IP Power Summary" tab.
- Made minor revision to the description in Intel® FPGA PTC Hierarchy Manager.
- Added the following new topics:
- Intel® FPGA PTC IP Power Summary
- Finding Resources Using the Find Dialog Box
- Intel® FPGA PTC Searchable Drop-Down Lists
- Added a new section about the "Input Device Utilization of Resources as a Percentage" in Intel® FPGA PTC - Common Page Elements.
- Updated the description of columns in the following pages:
- Intel® FPGA PTC - Logic Page
- Intel® FPGA PTC - RAM Page
- Intel® FPGA PTC - DSP Page
- Added a note to Intel® FPGA PTC - Report Page.
- Updated the images in the following topics:
- Overview of the Intel® FPGA Power and Thermal Calculator
- Intel FPGA PTC Primary GUI Components
- Entering Hierarchy Information Into the Intel FPGA PTC
- Exporting, Importing, Duplicating, Renaming, and Deleting Hierarchies in the Intel FPGA PTC
- Bulk Editing Hierarchies in the Intel FPGA PTC
|
| 2023.06.26 |
23.2 |
- Revised the " Intel® FPGA PTC Hierarchy Manager" image in Entering Hierarchy Information Into the FPGA PTC.
- Revised the images and added additional information about device selection in Intel® FPGA PTC Primary GUI Components.
- Made minor updates in Intel® FPGA PTC - Main Page.
- Added Bulk Editing Hierarchies in the Intel FPGA PTC.
- Added additional information for Intel Agilex 7 devices in FPGA PTC - Transceiver Page.
- Revised the images in Exporting, Importing, Duplicating, Renaming, and Deleting Hierarchies in the Intel® FPGA PTC and Launching the IP Wizard with button.
- Revised Intel® FPGA PTC Hierarchy Manager to include details about bulk editing.
- Revised the Intel® FPGA Power and Thermal Calculator image in Overview of the Intel® FPGA Power and Thermal Calculator .
- Revised the I/O Page image and included "Voltage setting for unused HVIO banks" field description in Intel® FPGA PTC - I/O Page.
|
| 2023.03.31 |
23.1 |
- Added support for Intel Agilex 7 M-series devices.
- Added NOC to Intel FPGA PTC Data Entry Pages and PTC - Power Summary
- Added the following parameters to the RAM Page Information table
- Vertical Network
- Vertical Network Port – Read From External Memory Enable %
- Vertical Network Port – Clock Enable %
- Added Intel FPGA PTC - NOC Page
- Added Pseudo channel 0 and Pseudo channel 1 to Intel FPGA PTC - HBM Page
- Renamed Power Summary window to Power Summary/Navigation
|
| 2022.12.19 |
22.4 |
- In the Overview chapter:
- Removed footnote stating that the PTC does not support importing data from the Quartus® Prime Power Analyzer.
- In the Accessing the Intel® FPGA Power and Thermal Calculators topic, added a paragraph to the first row of the table.
- In the Estimating Power Consumption chapter:
- Modified the Estimating Power While Creating the FPGA Design topic.
- Added the Importing a .qptc File Generated in the Intel Quartus Prime Power Analyzer topic.
- Modified the steps and figures in the Entering Hierarchy Information Into the Intel FPGA PTC topic.
- Modified the steps and figure in the Exporting, Importing, Duplicating, Renaming, and Deleting Hierarchies in the Intel FPGA PTC topic.
- In the Graphical User Interface chapter:
- Changed Module Manager to Hierarchy Manager in the Intel FPGA PTC Primary GUI Components topic.
- Changed modules to entities in the Intel FPGA PTC Data Entry Pages topic.
- Added the Intel® FPGA PTC - IP Wizard topic.
- In the Intel FPGA Power and Thermal Calculator Pages chapter, updated figures and column description tables in the following topics:
- Intel® FPGA PTC - Logic Page
- Intel® FPGA PTC - RAM Page
- Intel® FPGA PTC - DSP Page
- Intel® FPGA PTC - Clocks Page
- Intel® FPGA PTC - PLLs Page
- Intel® FPGA PTC - I/O Page
- Intel® FPGA PTC - Transceivers Page
- Intel® FPGA PTC - HPS Page
- Intel® FPGA PTC - Crypto Page
- Intel® FPGA PTC - HBM Page
- Removed the deprecated Intel® FPGA PTC - I/O-IP Page.
- Updated numerous figures and aligned terminology throughout the document.
|
| 2022.09.26 |
22.3 |
- Revised Overview of the Intel® FPGA Power and Thermal Calculator topic for hierarchy support.
- Revised Intel® FPGA PTC Power Model Status topic for clarity.
- Consolidated several topics into the Intel FPGA PTC Versions Available topic.
- Updated the Estimating Power Consumption Before Starting the Design topic for hierarchy support.
- Added new Using Design Hierarchies in Intel FPGA PTC topic.
- Added new Entering Hierarchy Information Into the Intel FPGA PTC topic.
- Added new Exporting, Importing, Duplicating, Renaming, and Deleting Hierarchies from Intel FPGA PTC topic.
- Added Module Manager explanation and new screenshot to Intel FPGA PTC Primary GUI Components topics.
- Added new Intel® FPGA PTC Module Manager topic.
- Revised explanation of manual mode in the Intel FPGA PTC - Common Page Elements topic.
- Revised Intel® FPGA PTC - I/O Page for new GPIO voltage setting.
- Revised Intel® FPGA PTC - Transceiver Page for new Treatment of Unused Transceiver Dies setting.
- Updated the following topics for hierarchy support:
- Intel® FPGA PTC - Logic Page
- Intel® FPGA PTC - RAM Page
- Intel® FPGA PTC - DSP Page
- Intel® FPGA PTC - PLL Page
- Intel® FPGA PTC - I/O Page
- Intel® FPGA PTC - Transceiver Page
- Intel® FPGA PTC - HPS Page
- Intel® FPGA PTC - Crypto Page
- Intel® FPGA PTC - HBM Page
|
| 2022.06.20 |
22.2 |
- In the Intel® FPGA PTC Power Model Status topic, updated the statement of accuracy for the PTC for most Stratix® 10 and Intel Agilex designs.
- In the Estimating Power Consumption While Creating the FPGA Design topic, added a new section: Appending an Imported .ptc or .qptc File to An Existing Design in the Intel FPGA Power and Thermal Calculator.
- In the Intel® FPGA Power and Thermal Calculator Graphic User Interface chapter, added the Deleting Rows from a Table topic.
- In the Intel® FPGA Power and Thermal Calculator Pages chapter, in the Intel® FPGA PTC Power Summary topic, added a note to the Intel Agilex PTC Power Summary section of the table.
|
| 2022.03.28 |
22.1 |
- In the Setting Up the Intel® FPGA Power and Thermal Calculator chapter, in the Power Analysis for Dual-Core 1SG10M Stratix® 10 Devices topic, made a minor addition to step 7 and added a bullet point in the Interpreting the Spreadsheet section.
- In the Intel® FPGA Power and Thermal Calculator Pages chapter:
- In the Intel® FPGA PTC - Common Page Elements topic, added a note to the Power Rail Current Consumption section.
- Added a note to the RAM Mode description in the Intel® FPGA PTC - RAM Page topic,
- Modified the # PMAs description in the Intel® FPGA PTC - Transceiver Page topic,
- In the Intel® FPGA PTC - Report Page topic, added two bullet points explaining a minor format difference between Intel Agilex and Stratix® 10 versions of the Report page.
|
| 2021.12.13 |
21.4 |
- In the Intel® FPGA Power and Thermal Calculator Graphical User Interface chapter, added an entry for the Crypto page to the Intel FPGA Data Entry Pages topic.
- In the Intel® FPGA Power and Thermal Calculator Pages chapter:
- In the Power Summary topic, added Crypto to the Intel Agilex PTC Power Summary section of the table.
- Added the Crypto Page topic.
- In the Thermal Page topic, modified the illustrations and changed the Apply recommended margin parameter to Apply additional margin, and modified the description accordingly.
|
| 2021.10.04 |
21.3 |
- Added the Power Analysis for Dual-Core 1SG10M Stratix® 10 Devices topic.
- Added a note and one new section to the Intel® FPGA PTC - Common Page Elements topic.
- Removed a line from the Power Characteristics description in the Device Selection Parameters table in the Intel® FPGA PTC - Main Page topic.
- Added the Calculating ALM Utilization and Calculating Register Utilization sections to the Intel® FPGA PTC - Logic Page topic.
- Removed references to Enpirion devices, throughout.
|
| 2021.07.22 |
21.1 |
Revised the description of the FPGA Core row name for TSD Offset, in the TSD Offset table in the Stratix® 10 section of the Thermal Page topic. |
| 2021.06.10 |
21.1 |
In the Intel® FPGA Power and Thermal Calculator Pages chapter, implemented a minor wording change to the PLL Reference Clock Frequency (MHz) description in the I/O-IP Page topic. |
| 2021.03.29 |
21.1 |
- Implemented minor changes and updates to figures, throughout.
- In the Intel® FPGA Power and Thermal Calculator Pages chapter:
- Modified the table in the Intel FPGA PTC - Power Summary topic.
- Modified the Junction temperature, TJ description in the Main Page topic.
- Added the eSRAM ID column to the RAM Page topic.
- Added the Domain column to the Clock Page topic.
- Added the IO Bank and Bank ID columns to the I/O Page topic.
- Modified the description of the Treatment of Unused HSSI Dies parameter, and made several changes to the Transceiver Page Information table in the Transceiver Page topic.
- Made extensive changes to the Thermal Page topic.
- Made changes to the Current and Power Regulator Requirements Per Voltage Rail table, in the Report Page topic.
- In the Factors Affecting the Accuracy of the Intel® FPGA Power and Thermal Calculator chapter, added the I/O Bank Allocation topic.
|
| 2021.01.21 |
20.3 |
In the Intel® FPGA Power and Thermal Calculator Pages chapter:
- In the I/O Page topic, modified the description of the OE % column.
- Under the Transceiver Page topic, added the Estimating E-Tile Channel PLL Power with the Intel Power and Thermal Calculator topic.
|
| 2020.10.05 |
20.3 |
- In the Setting Up the Intel FPGA Power and Thermal Calculator chapter, made minor changes to the following topics:
- Obtaining the Standalone Intel FPGA Power and Thermal Calculator
- Estimating Power Consumption While Creating the FPGA Design
- In the Intel FPGA Power and Thermal Calculator Graphical User Interface chapter, made minor changes to the following topics:
- Intel FPGA PTC Select Family Dialog Box
- Intel FPGA PTC Basic GUI Components
- Intel FPGA PTC Data Entry Pages
- Intel FPGA PTC Field Types
- Intel FPGA PTC Data Entry Error Messages
- Made changes to every topic in the Power and Thermal Calculator Pages chapter.
|
| 2020.07.24 |
20.1 |
In the Power and Thermal Calculator Tabs chapter, implemented changes to the Intel® FPGA PTC - ADC/DAC Tab ( Stratix® 10 Devices Only) topic. |
| 2020.05.28 |
20.1 |
In the Intel® FPGA PTC - Thermal Tab topic:
- Modified the FPGA Core TSD Offset (°C) description in the HBM Die ΨJC(°C/W) table.
- Modified and consolidated the descriptions for the entries in the Transceiver Die TSD Offset (°C) table.
|
| 2020.04.27 |
20.1 |
In the Power and Thermal Calculator Tabs chapter, updated the figure and revised the table contents, in the Intel® FPGA PTC - ADC/DAC Tab ( Stratix® 10 Devices Only) topic. |
| 2020.04.13 |
20.1 |
- Added support for Stratix® 10 devices, throughout.
- In the Setting Up the Intel® FPGA Power and Thermal Calculator chapter:
- Modified the Licensing information in the Availability topic.
- Modified the Importing information in the Estimating Power Consumption While Creating the FPGA Design topic.
- In the Power and Thermal Calculator Graphical User Interface chapter:
- Added the Intel® FPGA PTC Select Family Dialog Box and Intel® FPGA PTC Basic GUI Components topics.
- In the Power and Thermal Calculator Tabs chapter:
- Added a Notice statement to the Power and Thermal Calculator Tabs topic.
- Added the Intel® FPGA PTC - ADC/DAC Tab topic.
- Added the Intel® FPGA PTC - HBM Tab topic.
- Added the Intel® FPGA PTC - Thermal Tab topic.
- Added the Intel® FPGA PTC - Intel® Enpirion® Tab topic.
- Added the Intel® FPGA Power and Thermal Calculator User Guide Archive.
|
| 2020.02.14 |
19.4 |
Initial release. |