Intel® FPGA Power and Thermal Calculator User Guide

ID 683445
Date 9/26/2022
Public
Document Table of Contents

5.14. Intel® FPGA PTC - HBM Page

The HBM data entry page of the Intel® FPGA Power and Thermal Calculator (PTC) shows the power information pertaining to high-bandwidth memory (HBM). This page is available for Intel® Stratix® 10 devices only.
Table 23.  HBM Channel Configuration
Column Heading Description
Module A user-editable field to name each module of the design.
Full Hierarchy Name Specify the hierarchical path relevant to this entry. This is an optional entry. When entering levels of hierarchy, the pipe character (|) denotes a level of hierarchy.
HBM ID Select the top or bottom HBM stack in devices that include multiple stacks.
Channel ID Selects a particular die in the stack.
PC0 Traffic Pattern Select the traffic pattern that most closely matches your application. (PC0 and PC1 refer to the two pseudo-channels that each physical channel [0-7] is divided into; you can select different traffic patterns for each pseudo-channel.)
PC1 Traffic Pattern Select the traffic pattern that most closely matches your application. (PC0 and PC1 refer to the two pseudo-channels that each physical channel [0-7] is divided into; you can select different traffic patterns for each pseudo-channel.)
User Comment User Comment field.
Figure 33. HBM Page of the Intel® FPGA PTC


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