3.4.1. Entering Hierarchy Information Into the Intel® FPGA PTC
When entering levels of hierarchy in the Intel® FPGA PTC, the pipe character (|) denotes a level of hierarchy. For example, the following notation indicates three levels of hierarchy. Hierarchy a is the highest level. Hierarchy b is the second level. Hierarchy c is the third level.
When you enter a module name for a given hierarchy, the Intel® FPGA PTC automatically updates the module name on all data entry pages that include that hierarchy.
To enter design hierarchy information into the Intel® FPGA PTC, follow these steps:
- Open your version of the Intel® FPGA PTC, as Accessing the Intel FPGA Power and Thermal Calculators describes.
- Click the View menu and select one of the Intel® FPGA PTC pages, such as the Logic page.
Figure 2. Intel® FPGA PTC Logic Page
- In the Full Hierarchy Name cell, type the hierarchical name of a hierarchy in your design, using the pipe character (|) as the hierarchy level delimiter. For example, the following defines the b level of hierarchy that is child of hierarchy a:
a|bFigure 3. Entering Full Hierarchy Name in Intel® FPGA PTC
- In the Module cell, enter the name of the design module. If this hierarchy already exists on another Intel® FPGA PTC data entry page, the Module cell is already populated.
- Specify values for the #Half, ALMs, #FF, Clock Freq, and Routing Factor cells for each hierarchy and page.
The instance appears hierarchically in the Module Manager in the Intel® FPGA PTC, showing the dynamic power estimate for each hierarchy level, and the cumulative power for all instances and hierarchy levels.Figure 4. Intel® FPGA PTC Module Manager
- In the Module Manager, you can right-click any instance to Rename, Duplicate, or Export the Intel® FPGA PTC data for the levels of hierarchy that you define.
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