3.1. Consider the Memory Block Selection
To assign the memory to a specific block size manually, use the parameter editor of the on-chip memory IPs.
For the MLABs, you can implement single-port SRAM through emulation using the Intel® Quartus® Prime software. Emulation minimizes additional use of logic resources.
- For Intel® Stratix® 10 devices, the Resource Property Editor and the Timing Analyzer report the location of the M20K block as EC_X<number>_Y<number>_N<number>, even though the assigned location allowed is M20K_X<number>_Y<number>_N<number>. Embedded Cell (EC) is the sub-location of the M20K block.
- When you select AUTO memory block type with clock enable port connected in the parameter editors of the RAM IPs, the fitter will always choose M20K instead of MLAB.