Generic Serial Flash Interface Intel® FPGA IP User Guide

ID 683419
Date 4/01/2024
Document Table of Contents

1.8.4. Flash Operations that Require An Address

The following flash operations require an address:

  • Sector erase
  • Bulk erase
  • Die erase
Note: You must execute the write enable operation before you start these operations.

The following registers are used for operations that require an address:

  • Flash command setting register
  • Flash command control register
  • Flash command address register

Perform the Flash Sector Erase Operation

proc erase_sector { } {
global mp flash_cmd_setting flash_cmd_ctrl flash_cmd_addr_register
master_write_32 $mp $flash_cmd_setting 0x000004D8
master_write_32 $mp $flash_cmd_addr_register 0x00001000
master_write_32 $mp $flash_cmd_ctrl 0x1

To perform the flash sector erase operation, follow these steps:

  1. Define the global variables.
  2. Customize the sector erase operation by writing to the flash command setting register.
    1. Set bit [7:0] of this register to D8 as D8h is the operation code of the sector erase operation.
    2. Set bit [10:8] to 4 as 4 bytes of address is sent to the flash device.
    3. Set bit 11 to 0 as the number of byte declared in bit [15:12] is the write data to the flash device.
  3. Specify any address within the sector that you want to erase and write it to the flash command address register.
    1. In this example, we are performing the erase sector operation for address 00001000.
  4. Write 1 to bit 0 of the flash command control register to start the sector erase operation.

This IP core supports flash in the extended, dual, and quad I/O protocols. Currently, the protocols supported by this IP core is a single-transfer rate (STR) only. This IP core supports both the 3-byte and 4-byte addressing modes. Different protocols and addressing modes to read memory and program operations are explained in the following sections.