AN647: Single-Port Triple Speed Ethernet and On-Board PHY Chip Reference Design

ID 683344
Date 12/14/2015

1.4.1. Hardware and Software Requirements

The reference designs require the following hardware and software:

  • Arria 10 GX, Arria V GX, or Stratix V GX, or Stratix IV GX FPGA Development Kit
  • USB-Blaster® or ByteBlaster® download cable
  • External Ethernet packet generator (only for Avalon-ST reverse loopback test)
  • Ethernet cable assembly (only for Avalon-ST reverse loopback test)
  • Quartus® Prime version 15.0 or later
    • USB-Blaster or ByteBlaster driver
    • Qsys system
    • System Console

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