Customizable Flash Programmer User Guide

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ID 683271
Date 4/28/2023
Public
Document Table of Contents
Document Table of Contents x
1. Customizable Flash Programmer Overview 2. Customizable Flash Programmer 3. Implementing the Customizable Flash Programmer 4. Document Revision History for the Customizable Flash Programmer User Guide
1. Customizable Flash Programmer Overview x
1.1. Device Family Support 1.2. Software Support
2. Customizable Flash Programmer x
2.1. Programmer Image 2.2. System Console TCL Script 2.3. Limitations and Restrictions
3. Implementing the Customizable Flash Programmer x
3.1. Generating the Raw Programming Data File (.rpd) from User Design 3.2. Compiling the Programmer Image Project and Generating the .sof File 3.3. Customizing the TCL Script 3.4. Programming the Flash Using the System Console
3.1. Generating the Raw Programming Data File (.rpd) from User Design x
3.1.1. Understanding Quad SPI Flash Byte-Addressing 3.1.2. Understanding Dummy Clock Cycles for Single and Quad IO Fast Read 3.1.3. Generating the .rpd File Using the Convert Programming File Tool
3.1.3. Generating the .rpd File Using the Convert Programming File Tool x
3.1.3.1. Generating .rpd File for Intel® Arria® 10 and Intel® Cyclone® 10 GX Devices 3.1.3.2. Generating .rpd File for Other FPGA Devices
3.2. Compiling the Programmer Image Project and Generating the .sof File x
3.2.1. Configuring the IP Cores Setting 3.2.2. Assigning External Clock Source for the IP Cores 3.2.3. Generating the Programmer Image .sof File from the Reference Project
3.2.1. Configuring the IP Cores Setting x
3.2.1.1. Configuring JTAG to Avalon® Master Bridge IP Core 3.2.1.2. Configuring Intel AvMM Bursting Master IP Core 3.2.1.3. Configuring Generic Serial Flash Interface IP Core
3.3. Customizing the TCL Script x
3.3.1. TCL Script Structures 3.3.2. TCL Script User Setting 3.3.3. Customizing the Programming Flow 3.3.4. Creating Custom Functions
3.4. Programming the Flash Using the System Console x
3.4.1. Executing Commands in the System Console 3.4.2. Executing the System-Console Commands in the Nios® II Command Shell
1. Customizable Flash Programmer Overview
2. Customizable Flash Programmer
3. Implementing the Customizable Flash Programmer
4. Document Revision History for the Customizable Flash Programmer User Guide

3.1.3.2. Generating .rpd File for Other FPGA Devices

To generate the .rpd file for other FPGA devices, follow these steps:

  1. Create quartus.ini in any of the following folders:
    • Quartus project folder
    • For Windows: %QUARTUS_ROOTDIR%\bin64
    • For Linux: $QUARTUS_ROOTDIR/linux64
  2. Fill in the quartus.ini directive according to the flash byte-addressing mode, regardless of the flash density.
    Quad SPI Flash Byte-Addressing Mode quartus.ini Directive
    3-byte PGM_ALLOW_QSPI128=ON
    4-byte PGM_ALLOW_QSPI512=ON
  3. Set the following settings in the Convert Programming File tool.
    1. Specify the programming file type: POF
    2. Select the configuration device.
      • Select QSPI128 for 3-byte addressing.
      • Select QSPI512 for 4-byte addressing.
    3. Select mode: Active Serial x1 or Active Serial x4.
    4. For Advanced Options:
      1. Check Advanced... > Disable EPCS/EPCQ ID check.
      2. Fill up the dummy clock for quad SPI flash single IO and quad IO modes. Refer to the third-party quad SPI flash datasheet for this information.
    5. Check Create config data RPD (Generate output_file_auto.rpd).
    6. Under Input files to convert, select the .sof file for your design.
      Intel recommends enabling compression for the .sof file to reduce the .rpd file size.
    7. Click Generate.
The generated <output_file>_auto.rpd file is the configuration bitstream to be programmed into the quad SPI flash using the Customizable Flash Programmer. The generated .pof file can be ignored.
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