DMA Accelerator Functional Unit User Guide: Intel® FPGA Programmable Acceleration Card D5005

ID 683270
Date 8/03/2020
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3.1.1. DMA AFU Address Space

The host can access registers listed in the DMA AFU Memory Map and DMA BBB Memory Map tables in the DMA AFU Register Map section.

The DMA BBB subsystem has access to the full 49-bit address space. The lower half of this address space includes the local FPGA memories. The upper half of this address space includes the 48-bit host address memory.

The following figure shows the host and DMA views of memory.
Figure 4. The DMA AFU and Host Views of Memory