Compiled Hardware Accelerator image implemented in FPGA logic that accelerates an application.
|Accelerator Functional Unit
Hardware Accelerator implemented in FPGA logic which offloads a computational operation for an application from the CPU to improve performance.
|Application Programming Interface
|A set of subroutine definitions, protocols, and tools for building software applications.
|Core Cache Interface
CCI-P is the standard interface AFUs use to communicate with the host.
|Device Feature Header
|Creates a linked list of feature headers to provide an extensible way of adding features.
|FPGA Interface Manager
The FPGA hardware containing the FPGA Interface Unit (FIU) and external interfaces for memory, networking, etc.
The Accelerator Function (AF) interfaces with the FIM at run time.
|FPGA Interface Unit
FIU is a platform interface layer that acts as a bridge between platform interfaces like PCIe* , UPI and AFU-side interfaces such as CCI-P.
|Memory Properties Factory
|The MPF is a Basic Building Block (BBB) that AFUs can use to provide CCI-P traffic shaping operations for transactions with the FIU.