AN 709: HPS SoC Boot Guide - Cyclone V SoC Development Kit

ID 683265
Date 1/27/2016
Public
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1.2.2.4. Boot from FPGA

When booting from FPGA, the Boot ROM performs the following operations:

  • Waits for FPGA to be configured and in user mode
  • Verifies that the Boot from FPGA was enabled in the FPGA fabric
  • Jumps to address 0xC0000000, corresponding to offset 0 on the HPS-2-FPGA bridge
Note: The configuration on the FPGA side needs to enable the signal notifying the HPS that a boot image is available (f2h_boot_from_fpga_ready).
Note: No other checking, such as CRC of the image, is performed. No clocking configuration is performed either, and the CSEL value is ignored.