Visible to Intel only — GUID: ojh1493096739957
Ixiasoft
1.1. Block-Based Design Terminology
1.2. Block-Based Design Overview
1.3. Design Methodologies Overview
1.4. Design Partitioning
1.5. Design Block Reuse Flows
1.6. Incremental Block-Based Compilation Flow
1.7. Setting-Up Team-Based Designs
1.8. Bottom-Up Design Considerations
1.9. Debugging Block-Based Designs with the Signal Tap Logic Analyzer
1.10. Block-Based Design Flows Revision History
1.11. Quartus® Prime Pro Edition User Guide: Block-Based Design Document Archive
Visible to Intel only — GUID: ojh1493096739957
Ixiasoft
1.5.1.3. Step 3: Developer: Create a Black Box File
Reusing a core partition .qdb file also requires that you add a supporting black box file to the Consumer project. A black box file is an RTL source file that only contains port and module or entity definitions, but does not contain any logic.
The black box file defines the ports and port interface types for synthesis in the Consumer project. Follow these steps to create a block box port definitions file for the partition.
The Compiler analyzes and elaborates any RTL that you include in the black box file. Edits to the RTL do not affect a partition that uses a .qdb file.
- Create an HDL file (.v, .vhd, .sv) that contains only the port definitions for the exported core partition. Include parameters or generics passed to the module or entity. For example:
module bus_shift #( parameter DEPTH=256, parameter WIDTH=8 )( input clk, input enable, input reset, input [WIDTH-1:0] sr_in, output [WIDTH-1:0] sr_out ); endmodule
- Provide the black box file and exported core partition .qdb file to the Consumer.