HDMI Intel® Arria® 10 FPGA IP Design Example User Guide

ID 683156
Date 1/26/2024

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2.7. Design Software Flow

In the design main software flow, the Nios® II processor configures the TI redriver setting and initializes the TX and RX paths upon power-up.
Figure 12. Software Flow in main.c Script

The software executes a while loop to monitor sink and source changes, and to react to the changes. The software may trigger TX reconfiguration, TX link training and start transmitting video.

Figure 13. TX Path Initialization Flowchart
Figure 14. RX Path Initialization Flowchart
Figure 15. TX Reconfiguration and Link Training Flowchart
Figure 16. Link Training LTS:3 Process at Specific FRL Rate Flowchart
Figure 17. HDMI TX Video Transmission Flowchart