Guidelines for Developing a Nios II HAL Device Driver

ID 683146
Date 6/12/2015
Public
Document Table of Contents

1.14. Document Revision History

Table 1.  Document Revision History
Date Version Changes
May 2015 2015.05.07
  • NEEK changed to Nios II Cyclone V E FPGA Development Kit
  • nios2-terminal changed to Tera Term
  • Updated Software Requirements for the Driver Example section
  • Updated Debugging the bit_bang_uart Project section
  • Updated Asterisk Transmitted from Memory-Mapped Register image
  • Updated Characters Transmitted by Manipulating UART Register image
  • Updated Stepping Over the BitBangUartTransmit() Function image
  • Updated Transmitting BIT BANGBASH by Stepping Through the Function image
  • Updated Transmitter Overrun image
  • Updated Waiting to Receive Character on UART image
July 2011 4.0 Updated instructions and design example for Qsys
January 2010 3.0
  • Update for the Nios II Software Build Tools for Eclipse
  • Update the examples to run on the NEEK
  • Update the design example to use the EIC and VIC
  • Update the software examples to use the HAL enhanced interrupt API
November 2008 2.0
  • Nios II version 8.0 upgrade, adaptation of the Altera_Avalon_UART device driver to become the my_uart_driver device driver
  • Nios II Software Build Tools conversion for my_uart IP, hal_my_uart BSP, and bit_bang_uart and hello_world_my_uart applications
  • Changed size of document to 8.5 x 11 inches
August 2007 1.0 Initial release.

Did you find the information on this page useful?

Characters remaining:

Feedback Message