Guidelines for Developing a Nios II HAL Device Driver

Download PDF
ID 683146
Date 6/12/2015
Public
Document Table of Contents
Document Table of Contents x
1. Guidelines for Developing a Nios II HAL Device Driver
1. Guidelines for Developing a Nios II HAL Device Driver x
1.1. Prerequisites for HAL Device Driver Development 1.2. Developing the HAL UART Device Driver 1.3. Debugging the bit_bang_uart Project 1.4. The BitBangUartTransmit() Function 1.5. The BitBangUartReceive() Function 1.6. Creating Device Hardware Access Macros 1.7. Staging the HAL Device Driver Development 1.8. Understanding the Hardware-Specific INSTANCE and INIT Macros 1.9. Integrating a New HAL Device Driver in the BSP 1.10. Understanding HAL Mutual Exclusion Resources 1.11. Overview of Debugging Tools for HAL Device Drivers 1.12. Debugging the HAL UART Device Driver 1.13. Conclusion 1.14. Document Revision History
1.1. Prerequisites for HAL Device Driver Development x
1.1.1. Using the HAL Architecture and Services 1.1.2. Software Requirements for the Driver Example 1.1.3. HAL Device Drivers and Components
1.2. Developing the HAL UART Device Driver x
1.2.1. Preparing the bit_bang_uart Application and hal_my_uart BSP 1.2.2. Preparing the my_uart_driver Device Driver 1.2.3. Configuring the Altera_Avalon_UART Component 1.2.4. Importing Projects 1.2.5. Verifying Software Functionality 1.2.6. Preview: Customizing the Design
1.2.6. Preview: Customizing the Design x
1.2.6.1. Making Software Modifications 1.2.6.2. Making Hardware Modifications
1.12. Debugging the HAL UART Device Driver x
1.12.1. Setting Breakpoints in the my_uart_driver Device Driver 1.12.2. Setting Watchpoints in the HAL UART Device Driver 1.12.3. Reducing Driver Code and Memory Footprint 1.12.4. Interrupt Latency and Determinism 1.12.5. Debugging with the Altera Logging Functions
1.12.3. Reducing Driver Code and Memory Footprint x
1.12.3.1. Using the Reduced Device Drivers API Option 1.12.3.2. Using the Lightweight Device Drivers API Option
1.12.5. Debugging with the Altera Logging Functions x
1.12.5.1. Altera Logging Usage 1.12.5.2. Altera Logging Example
1. Guidelines for Developing a Nios II HAL Device Driver

1.14. Document Revision History

Table 1.  Document Revision History
Date Version Changes
May 2015 2015.05.07
  • NEEK changed to Nios II Cyclone V E FPGA Development Kit
  • nios2-terminal changed to Tera Term
  • Updated Software Requirements for the Driver Example section
  • Updated Debugging the bit_bang_uart Project section
  • Updated Asterisk Transmitted from Memory-Mapped Register image
  • Updated Characters Transmitted by Manipulating UART Register image
  • Updated Stepping Over the BitBangUartTransmit() Function image
  • Updated Transmitting BIT BANGBASH by Stepping Through the Function image
  • Updated Transmitter Overrun image
  • Updated Waiting to Receive Character on UART image
July 2011 4.0 Updated instructions and design example for Qsys
January 2010 3.0
  • Update for the Nios II Software Build Tools for Eclipse
  • Update the examples to run on the NEEK
  • Update the design example to use the EIC and VIC
  • Update the software examples to use the HAL enhanced interrupt API
November 2008 2.0
  • Nios II version 8.0 upgrade, adaptation of the Altera_Avalon_UART device driver to become the my_uart_driver device driver
  • Nios II Software Build Tools conversion for my_uart IP, hal_my_uart BSP, and bit_bang_uart and hello_world_my_uart applications
  • Changed size of document to 8.5 x 11 inches
August 2007 1.0 Initial release.
Level Two Title