Intel® Quartus® Prime Pro Edition User Guide: Design Constraints

ID 683143
Date 6/21/2022
Public

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4.5.1.2. Defining the Board Trace Model

The board trace model describes a board trace and termination network as a set of capacitive, resistive, and inductive parameters.

Advanced I/O Timing uses the model to simulate the output signal from the output buffer to the far end of the board trace. You can define the capacitive load, any termination components, and trace impedances in the board routing for any output pin or bidirectional pin in output mode. You can configure an overall board trace model for each I/O standard or for specific pins. Define an overall board trace model for each I/O standard in your design. Use that model for all pins that use the I/O standard. You can customize the model for specific pins using the Board Trace Model window in the Pin Planner.

  1. Click Assignments > Device > Device and Pin Options.
  2. Click Board Trace Model and define board trace model values for each I/O standard.
  3. Click I/O Timing and define default I/O timing options at board trace near and far ends.
  4. Click Assignments > Pin Planner and assign board trace model values to individual pins.

Specifying Board Trace Model


## setting the near end series resistance model of sel_p output pin to 25 ohms
set_instance_assignment -name BOARD_MODEL_NEAR_SERIES_R 25 -to se1_p
## Setting the far end capacitance model for sel_p output signal to 6 picofarads
set_instance_assignment -name BOARD_MODEL_FAR_C 6P -to se1_p

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