3.3. Avalon-ST TX/RX
The Avalon-ST IP for PCI Express pairs with F-Tile. Within F-tile, FGT PHY (Transceiver) interacts with PCI Express Hard IP (HIP) directly. PCI Express Soft IP (within FPGA fabric) interacts with PCI Express Hard IP via MAIB-AIB interface. (EMIB).
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