2.1. The Board Platform Designer Subsystem
The diagram below represents a board system implementation in more details:
The OpenCL host communication interface and global memory interface are the main components of the board system. The memory-mapped device (MMD) layer communicates, over some medium, with the intellectual property (IP) core instantiated in this Platform Designer system.
For example, an MMD layer executes on a PCI Express® (PCIe®)-based host interface, and the host interface generates Avalon interface requests from an Intel® PCIe endpoint on the FPGA.
Within the board Platform Designer subsystem, you can also define the global memory system available to the OpenCL kernel. The global memory system may consist of different types of memory interfaces. Each memory type may consist of one, two, four, or eight banks of physical memory. All the banks of a given memory type must be the same size in bytes and have equivalent interfaces. If you have streaming I/O, you must also include the corresponding IP in the board Platform Designer system. In addition, you must update the board_spec.xml file to describe the channel interfaces.