AN 780: Compiling and Customizing an Intel® Arria® 10 Custom Platform for OpenCL*
ID
683045
Date
10/30/2018
Public
1.1. Introduction to Custom Platforms
1.2. OpenCL System Architecture
1.3. Hierarchical Structure of the Intel® Arria® 10 GX FPGA Development Kit Reference Platform's Hardware
1.4. Intel® Quartus® Prime Software Revisions Describing the Custom Platform
1.5. Intel® FPGA SDK for OpenCL™ and User Environment Setup
1.6. Intel® Arria® 10 Custom Platform Project Setup and Customization Procedure
1.7. Intel® Arria® 10 Custom Platform Customization Example
1.8. Updating Your Custom Platform to Target a Different Device
1.9. Migrating the Custom Platform between Different Intel® Quartus® Prime Software Versions
1.10. Document Revision History for Compiling and Customizing an Intel® Arria® 10 Custom Platform for OpenCL*
1.7.1. Modifying the board.qsys File in the Custom Platform
1.7.2. Modifying the Kernel (freeze_wrapper.v and board_spec.xml)
1.7.3. Updating the Top-Level I/O Ring with the Modified board.qsys and freeze_wrapper.v Files
1.7.4. Updating the Original Custom Platform Directory with the New Custom Platform Modifications
1.7.5. Compilation Log Files
1.7.6. Analyzing the Results from Compilation
1.7.1.1. Opening an Existing Intel® Quartus® Prime Project and the board.qsys Platform Designer System Design
1.7.1.2. Adding the Avalon® -ST Single Clock FIFO Component into the Platform Designer System
1.7.1.3. Connecting the Avalon® -ST Single Clock FIFO Component's Exported Signals in the Top-Level Platform Designer System
1.7.2.1. Opening an Existing Intel® Quartus® Prime Project and the kernel_system.qsys Platform Designer System Design
1.7.2.2. Adding an Avalon® -ST Adapter Component into the Platform Designer System
1.7.2.3. Connecting the Avalon® -ST Adapter Component's Exported Signals in the Top-Level Platform Designer System
1.7.2.4. Modifying the board_spec.xml File
1.7.2.5. Modifying the freeze_wrapper.v File
1. Compiling and Customizing an Intel® Arria® 10 Custom Platform for OpenCL
Updated for: |
---|
Intel® Quartus® Prime Design Suite 18.1 |
This application note describes the procedures and design considerations for modifying the Intel® Arria® 10 GX FPGA Development Kit Reference Platform into your own Custom Platform by using the Intel® Software Development Kit (SDK) for OpenCL™ 1 2
The information and customization techniques described in this document are applicable to any Intel® Arria® 10 Custom Platform. For reference information, consult the Intel® FPGA SDK for OpenCL™ Intel® Arria® 10 GX FPGA Development Kit Reference Platform Porting Guide. Contact your Intel representative for a copy of this porting guide.
This document also describes how to set up your Custom Platform’s operating environment and project with reference to a design example.
Section Content
Introduction to Custom Platforms
OpenCL System Architecture
Hierarchical Structure of the Intel Arria 10 GX FPGA Development Kit Reference Platform's Hardware
Intel Quartus Prime Software Revisions Describing the Custom Platform
Intel FPGA SDK for OpenCL and User Environment Setup
Intel Arria 10 Custom Platform Project Setup and Customization Procedure
Intel Arria 10 Custom Platform Customization Example
Updating Your Custom Platform to Target a Different Device
Migrating the Custom Platform between Different Intel Quartus Prime Software Versions
Document Revision History for Compiling and Customizing an Intel Arria 10 Custom Platform for OpenCL
1 The Intel® FPGA SDK for OpenCL™ is based on a published Khronos Specification, and has passed the Khronos Conformance Testing Process. Current conformance status can be found at www.khronos.org/conformance.
2 OpenCL and the OpenCL logo are trademarks of Apple Inc. and used by permission of the Khronos Group™.