AN 780: Compiling and Customizing an Intel® Arria® 10 Custom Platform for OpenCL*

ID 683045
Date 10/30/2018
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1.10. Document Revision History for Compiling and Customizing an Intel® Arria® 10 Custom Platform for OpenCL*

Document Version Intel® Quartus® Prime Version Changes
2018.10.30 18.1
  • Changed base.qdb to base.qar throughout.
  • Changed a10gx_ref_16.0 to a10gx_ref_18.1 throughout.
  • Changed ALTERAOCLSDKROOT to INTELFPGAOCLSDKROOT throughout.
  • Changed the device model file from 10ax115h3f34e2sge3_dm.xml to 10ax115h3f34e2sg_dm.xml throughout.
  • Rebranded the following occurrences:
    • Arria 10 to Intel® Arria® 10
    • Altera SDK for OpenCL to Intel® FPGA SDK for OpenCL™
    • Altera to Intel
    • Altera Offline Compiler (AOC) to Intel® FPGA SDK for OpenCL™ Offline Compiler
    • Qsys Pro to Platform Designer
    • LogicLock to Logic Lock
    • TimeQuest Timing Analyzer to Timing Analyzer
    • Quartus Prime Pro Edition to Intel® Quartus® Prime Pro Edition
  • Updated the titles of guides to point to the rebranded Intel® FPGA SDK for OpenCL™ guides.
  • In Modifying the freeze_wrapper.v File, fixed a typo error in step 2 and added a missing entry in the code block.
Date Version Changes
December 2016 2016.12.09 Converted content to DITA with minor editorial changes.
October 2016 2016.10.21 Initial release.