Low Latency Ethernet 10G MAC Intel® Stratix® 10 FPGA IP Design Example User Guide

ID 683026
Date 1/08/2024
Document Table of Contents

1.4. Changing Target Device in Hardware Design Example

The Low Latency Ethernet 10G MAC Intel® FPGA IP for Intel® Stratix® 10 devices generates a hardware example design for target device 1SG280HU1F50E2VG. If you want to use Intel® Stratix® 10 GX Signal Integrity L-Tile (Production) Development Kit or other Intel® Stratix® 10 devices as your target device, follow the steps in the Procedure section to change the target device.