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Intel® 22nm Technology

Introducing 3-D transistors manufactured at 22nm for future microprocessor families, continuing pursuit of Moore's Law.

Intel’s Tick Tock Model

Intel's Tick-Tock model maintains an innovation cadence in microprocessor manufacturing and microarchitecture with new advancements every other year.

Gate Dielectric Scaling for CMOS: from SiO2/PolySi to High-K/Metal-Gate

Presentation covers SiO2 scaling, high-k/metal-gate problems, breakthroughs, and performance reports for NMOS and PMOS transistors.

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Advanced High-K Gate Dielectric for Short-Channel in QWFE Transistors on Silicon Substrate

Paper: composite high-K gate in the QWFET silicon substrate integration for thin electrical oxide, low gate leakage, and carrier confinement.

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Role of High-K Gate Dielectrics

Presentation Discusses Role of High-K Gate Dielectrics and Metal Gate Electrodes in Emerging Nanoelectronic Devices.

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High-κ Gate Dielectrics, Metal Gate Electrodes in Silicon and Non-Silicon Logic Nanotechnology

Discusses low gate-leakage silicon and non-silicon transistor nanotechnology using high-κ gate dielectrics and metal gate electrodes.

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Non-Planar, Multi-Gate InGaAs QWFETs with High-K Gate Dielectric and Ultra Scaled Gate-to-Drain/Gate-to-Source Separation

Paper: non-planar, multi-gate InGaAs QWFETs with high-K gate dielectric and ultra-scaled gate-to-drain and gate-to-source separations of 5nm.

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Evaluation/Transport Physics: Schottky-Gate III-V Compound Semiconductor QWFE Transistors

Paper examines and evaluates logic performance of Schottky-gate QWFETs against that of advanced Strained Si MOSFETs in low power voltages.

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Intel Announces New 22nm 3D Tri-gate Transistors

Presentation: Intel introduces a fundamentally different technology for future microprocessor families, 3D transistors manufactured at 22nm.

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Intel Global Manufacturing Facts

Fact Sheet: Intel Global Manufacturing

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