Verilog Design File (.v)


An ASCII text file (with the extension .v, .verilog, .vlg, or .vh) created with the Quartus II Text Editor or any other standard text editor. A Verilog Design File contains design logic that is defined with Verilog HDL.

A Verilog Design File can contain any combination of the Verilog HDL constructs supported by the Quartus II software. For more information, see "Quartus II Verilog HDL Support."


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