HRS Address Map

Module Instance Base Address End Address
i_sdmmc__sdmmc_apb_slv__10808000____HRS____SEG_L4_MP_sdmmc_s_0x0_0x1000 0x10808000 0x108080FF
Register Offset Width Access Reset Value Description
HRS00 0x0 32 RO 0x00010000
HRS00 - General Information Register
HRS01 0x4 32 RO 0x00000032
HRS01 - Debounce Setting Register
HRS02 0x8 32 RO 0x00030000
HRS02 - Bus Setting Register
HRS03 0xC 32 RO 0x00000000
            HRS03 - AXI ERROR Responses Register\n
            These registers extend the standard set of SD-HOST interrupt statuses by information about AXI interface exceptions.\n
            The registers are divided into three groups:\n
            - Signal Enable registers allow to enable/mask signaling the Interrupt Status registers (HRS03[3:0]) on interrupt port\n
            - Status Enable registers allow to enable/disable interrupt source for each Interrupt Status separately\n
            - Interrupt Status are triggered whenever the interrupt source is detected and the Status Enable register is enabled\n
          
HRS04 0x10 32 RO 0x00000000
          
HRS05 0x14 32 RW 0x00000000
          
HRS06 0x18 32 RO 0x00000000
HRS06 - eMMC control registers
HRS07 0x1C 32 RO 0x00000000
HRS07 - IO Delay Information Register
HRS08 0x20 32 RO 0x00000000
HRS08 - PHY DLL Update Control and Status Register
HRS09 0x24 32 RW 0xF1C00001
HRS09 - PHY Control and Status Register
HRS10 0x28 32 RO 0x00000000
HRS10 - Host Controller SDCLK start point adjustment
HRS12 0x30 32 RO 0x00000000
HRS12 - Host Interrupt Status
HRS13 0x34 32 RO 0x00000000
HRS13 - Host Status Enable
HRS14 0x38 32 RO 0x00000000
HRS14 - Host Signal Enable
HRS16 0x40 32 RW 0x00000000
HRS16 - CMD/DAT output delay
HRS29 0x74 32 RO 0x00006061
            HRS29 - SD Magic Number\n
            "Product Number" - identification number aligned to the right (LSB).
          
HRS30 0x78 32 RO 0x00000003
            HRS30 - Host Capability Register\n
            This register states whether configurable options are available or are not available in the SD/eMMC Host Controller configuration. This register gives such information about features not been covered by the standard capability registers (SRS16-SRS18).
          
HRS31 0x7C 32 RO 0x06020001
            HRS31 - Host Controller Version\n
            This register contains the host controller version number.
          
HRS32 0x80 32 RW 0x00000000
HRS32 - FSM Monitor Register
HRS33 0x84 32 RO 0x00000000
HRS33 - Tune Status 0 Register
HRS34 0x88 32 RO 0x00000000
HRS34 - Tune Status 1 Register