HRS08 

         HRS08 - PHY DLL Update Control and Status Register
Module Instance Base Address Register Address
i_sdmmc__sdmmc_apb_slv__10808000____HRS____SEG_L4_MP_sdmmc_s_0x0_0x1000 0x10808000 0x10808020

Size: 32

Offset: 0x20

Access: RO

Important: The value of a reserved bit must be maintained in software. When you modify registers containing reserved bit fields, you must use a read-modify-write operation to preserve state and prevent indeterminate system behavior.
Bit Fields
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

Reserved_2

RO 0x0

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

Reserved_2

RO 0x0

PHY_DLL_UPDACK

RO 0x0

PHY_DLL_UPDREQ

RW 0x0

HRS08 Fields

Bit Name Description Access Reset
31:2 Reserved_2 
Reserved bitfield added by Magillem
 RO 0x0
1 PHY_DLL_UPDACK 
              PHY_DLL_UPDACK\n
              This register contains value read from sdphy_dfi_ctrlupd_ack port.
RO 0x0
0 PHY_DLL_UPDREQ 
              PHY_DLL_UPDREQ\n
              This register controls sdphy_dfi_ctrlupd_req port.
RW 0x0